Add Tercel PHY reset synchronization

[microwatt.git] / utils.vhdl

diff --git a/utils.vhdl b/utils.vhdl
index 7238641f528e6407342abca58349baf446aa8ac4..14a68385c86fe0c923867170b0e567776212405b 100644 (file)
--- a/utils.vhdl
+++ b/utils.vhdl
@@ -5,8 +5,9 @@ use ieee.numeric_std.all;
 package utils is
 
     function log2(i : natural) return integer;
+    function log2ceil(i : natural) return integer;
     function ispow2(i : integer) return boolean;
-
+    function round_up(i : integer; s : integer) return integer;
 end utils;
 
 package body utils is
@@ -22,6 +23,17 @@ package body utils is
         return ret;
     end function;
 
+    function log2ceil(i : natural) return integer is
+        variable tmp : integer := i;
+        variable ret : integer := 0;
+    begin
+        while tmp >= 1 loop
+            ret  := ret + 1;
+            tmp := tmp / 2;
+        end loop;
+        return ret;
+    end function;
+
     function ispow2(i : integer) return boolean is
     begin
         if to_integer(to_unsigned(i, 32) and to_unsigned(i - 1, 32)) = 0 then
@@ -31,5 +43,9 @@ package body utils is
         end if;
     end function;
 
+    function round_up(i : integer; s : integer) return integer is
+    begin
+        return ((i + (s - 1)) / s) * s;
+    end function;
 end utils;