X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=3d_gpu.mdwn;h=a4694124b43eb47222a4b9f7fabcef50f7d5f3a4;hb=cc23e36f4ac550a3bd672252edfaff610cab7762;hp=15fba0d2bfc92119b0de7b536e453ad8df666d1d;hpb=5eccd6b1bacb5d40a4b42f7116a5b7f8348e9be5;p=libreriscv.git

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 15fba0d2b..a4694124b 100644
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -44,7 +44,7 @@ See [[3d_gpu/articles]] online.
 
 # Progress:
 
-* Jul 2020: first ppc64le "hello world" binary executed.  80,000 gate coriolis2 auto-layout completed with 99.95% routing. Wishbone MoU signed making available access to an additional EUR 50,000 donations from NLNet. XDC2020 and OpenPOWER conference submissions entered.
+* Jul 2020: first ppc64le "hello world" binary executed.  80,000 gate coriolis2 auto-layout completed with 99.98% routing. Wishbone MoU signed making available access to an additional EUR 50,000 donations from NLNet. XDC2020 and OpenPOWER conference submissions entered.
 * Jun 2020: core unit tests and pipeline formal correctness proofs in place.
 * May 2020: first integer pipelines (ALU, Logical, Branch, Trap, SPR, ShiftRot, Mul, Div) and register files (XER, CR, INT, FAST, SPR) started.
 * Mar 2020: Coriolis2 Layout experiments successful. 6600 Memory Architecture