X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=3d_gpu.mdwn;h=f3ae9b04c9fce7fc17014368f5e929cdbf516887;hb=b662ed5657ceb14515d2e23044ab6d5ad6bd9cb6;hp=113493e34fc2c66b58779640da027e38c99841c6;hpb=ef50a035f0a9ca829f5a687f3094c0eb2ab442ee;p=libreriscv.git

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 113493e34..f3ae9b04c 100644
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -45,7 +45,7 @@ See [[3d_gpu/articles]] online.
 
 # Progress:
 
-* Oct 2020 [[80nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
+* Oct 2020 [[180nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
   for 180nm test ASIC, GDSII deadline set of Dec 2nd.
 * Sep 2020: [first boot](https://youtu.be/72QmWro9BSE) of Litex BIOS on a Versa ECP5 at 55mhz.  DDR3 RAM initialisation successful. 180nm ASIC pinouts started [[180nm_Oct2020/ls180]]
 * Aug 2020: [first boot](https://libre-soc.org/3d_gpu/libresoc_litex_bios_first_execution_2020-08-06_16-15.png) of litex BIOS in verilator simulation