X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=Makefile;h=abb446dd00b02008e36f3412235f37be5194d312;hb=434ee06553fc53e46da2282d7017fa68dfa4fb13;hp=b7d73ee58c280d298136d9773db7bffa972747c9;hpb=eed32853f8109e85a7f460941c9185771010c137;p=soc.git

diff --git a/Makefile b/Makefile
index b7d73ee5..abb446dd 100644
--- a/Makefile
+++ b/Makefile
@@ -49,8 +49,8 @@ ls180_4k_verilog:
 			src/soc/litex/florent/libresoc/libresoc.v
 
 # build the litex libresoc SoC without 4k SRAMs
-ls180_4ksram_verilog_build: ls180_verilog
-	make -C soc/soc/litex/florent ls1804k
+ls180_verilog_build: ls180_verilog
+	make -C soc/soc/litex/florent ls180
 
 # build the litex libresoc SoC with 4k SRAMs
 ls180_4ksram_verilog_build: ls180_4k_verilog