X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=debug%2Fgdbserver.py;h=09938d3f1b049b4e44674be4aa901285c6fdff41;hb=4590b79bc7241f3fa2424f96b4c6666a864fb6a9;hp=0ae75a7f9cca13b5de36302565013fb9310af712;hpb=a27ddca0570517e7e40a91c16e4c96c6c5f329e1;p=riscv-tests.git diff --git a/debug/gdbserver.py b/debug/gdbserver.py index 0ae75a7..09938d3 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -1,14 +1,18 @@ -#!/usr/bin/python +#!/usr/bin/env python -import os -import sys import argparse -import testlib -import unittest +import binascii +import random +import sys import tempfile import time -import random -import binascii +import os + +import targets +import testlib +from testlib import assertEqual, assertNotEqual, assertIn, assertNotIn +from testlib import assertGreater, assertRegexpMatches, assertLess +from testlib import GdbTest, GdbSingleHartTest, TestFailed, assertTrue MSTATUS_UIE = 0x00000001 MSTATUS_SIE = 0x00000002 @@ -30,6 +34,8 @@ MSTATUS_VM = 0x1F000000 MSTATUS32_SD = 0x80000000 MSTATUS64_SD = 0x8000000000000000 +# pylint: disable=abstract-method + def ihex_line(address, record_type, data): assert len(data) < 128 line = ":%02X%04X%02X" % (len(data), address, record_type) @@ -55,249 +61,331 @@ def ihex_parse(line): data += "%c" % int(line[8+2*i:10+2*i], 16) return record_type, address, data -class DeleteServer(unittest.TestCase): - def tearDown(self): - del self.server - -class SimpleRegisterTest(DeleteServer): - def setUp(self): - self.server = target.server() - self.gdb = testlib.Gdb() - # For now gdb has to be told what the architecture is when it's not - # given an ELF file. - self.gdb.command("set arch riscv:rv%d" % target.xlen) +def readable_binary_string(s): + return "".join("%02x" % ord(c) for c in s) - self.gdb.command("target extended-remote localhost:%d" % self.server.port) - - # 0x13 is nop - self.gdb.command("p *((int*) 0x%x)=0x13" % target.ram) - self.gdb.command("p *((int*) 0x%x)=0x13" % (target.ram + 4)) - self.gdb.command("p *((int*) 0x%x)=0x13" % (target.ram + 8)) - self.gdb.p("$pc=0x%x" % target.ram) - - def check_reg(self, name): - a = random.randrange(1< last_pc and pc - last_pc <= 4): + assertNotEqual(last_pc, pc) + if last_pc and pc > last_pc and pc - last_pc <= 4: advances += 1 else: jumps += 1 last_pc = pc # Some basic sanity that we're not running between breakpoints or # something. - self.assertGreater(jumps, 10) - self.assertGreater(advances, 50) + assertGreater(jumps, 1) + assertGreater(advances, 5) - def test_exit(self): +class DebugExit(DebugTest): + def test(self): self.exit() - def test_symbols(self): +class DebugSymbols(DebugTest): + def test(self): self.gdb.b("main") self.gdb.b("rot13") output = self.gdb.c() - self.assertIn(", main ", output) + assertIn(", main ", output) output = self.gdb.c() - self.assertIn(", rot13 ", output) + assertIn(", rot13 ", output) - def test_breakpoint(self): +class DebugBreakpoint(DebugTest): + def test(self): self.gdb.b("rot13") # The breakpoint should be hit exactly 2 times. - for i in range(2): + for _ in range(2): output = self.gdb.c() self.gdb.p("$pc") - self.assertIn("Breakpoint ", output) - #TODO self.assertIn("rot13 ", output) + assertIn("Breakpoint ", output) + assertIn("rot13 ", output) self.exit() - def test_hwbp_1(self): - if target.instruction_hardware_breakpoint_count < 1: - return +class Hwbp1(DebugTest): + def test(self): + if self.hart.instruction_hardware_breakpoint_count < 1: + return 'not_applicable' + + if not self.hart.honors_tdata1_hmode: + # Run to main before setting the breakpoint, because startup code + # will otherwise clear the trigger that we set. + self.gdb.b("main") + self.gdb.c() self.gdb.hbreak("rot13") # The breakpoint should be hit exactly 2 times. - for i in range(2): + for _ in range(2): output = self.gdb.c() self.gdb.p("$pc") - self.assertIn("Breakpoint ", output) - #TODO self.assertIn("rot13 ", output) + assertRegexpMatches(output, r"[bB]reakpoint") + assertIn("rot13 ", output) self.exit() - def test_hwbp_2(self): - if target.instruction_hardware_breakpoint_count < 2: - return +class Hwbp2(DebugTest): + def test(self): + if self.hart.instruction_hardware_breakpoint_count < 2: + return 'not_applicable' self.gdb.hbreak("main") self.gdb.hbreak("rot13") # We should hit 3 breakpoints. - for i in range(3): + for expected in ("main", "rot13", "rot13"): output = self.gdb.c() self.gdb.p("$pc") - self.assertIn("Breakpoint ", output) - #TODO self.assertIn("rot13 ", output) + assertRegexpMatches(output, r"[bB]reakpoint") + assertIn("%s " % expected, output) self.exit() - def test_too_many_hwbp(self): +class TooManyHwbp(DebugTest): + def test(self): for i in range(30): self.gdb.hbreak("*rot13 + %d" % (i * 4)) output = self.gdb.c() - self.assertIn("Cannot insert hardware breakpoint", output) + assertIn("Cannot insert hardware breakpoint", output) # Clean up, otherwise the hardware breakpoints stay set and future # tests may fail. self.gdb.command("D") - def test_registers(self): +class Registers(DebugTest): + def test(self): # Get to a point in the code where some registers have actually been # used. self.gdb.b("rot13") @@ -306,252 +394,490 @@ class DebugTest(DeleteServer): # Try both forms to test gdb. for cmd in ("info all-registers", "info registers all"): output = self.gdb.command(cmd) - self.assertNotIn("Could not", output) for reg in ('zero', 'ra', 'sp', 'gp', 'tp'): - self.assertIn(reg, output) + assertIn(reg, output) #TODO # mcpuid is one of the few registers that should have the high bit set # (for rv64). # Leave this commented out until gdb and spike agree on the encoding of # mcpuid (which is going to be renamed to misa in any case). - #self.assertRegexpMatches(output, ".*mcpuid *0x80") + #assertRegexpMatches(output, ".*mcpuid *0x80") #TODO: # The instret register should always be changing. #last_instret = None #for _ in range(5): # instret = self.gdb.p("$instret") - # self.assertNotEqual(instret, last_instret) + # assertNotEqual(instret, last_instret) # last_instret = instret # self.gdb.stepi() self.exit() - def test_interrupt(self): - """Sending gdb ^C while the program is running should cause it to halt.""" +class UserInterrupt(DebugTest): + def test(self): + """Sending gdb ^C while the program is running should cause it to + halt.""" self.gdb.b("main:start") self.gdb.c() - self.gdb.p("i=123"); + self.gdb.p("i=123") self.gdb.c(wait=False) - time.sleep(0.1) + time.sleep(2) output = self.gdb.interrupt() - #TODO: assert "main" in output - self.assertGreater(self.gdb.p("j"), 10) - self.gdb.p("i=0"); + assert "main" in output + assertGreater(self.gdb.p("j"), 10) + self.gdb.p("i=0") self.exit() -class StepTest(DeleteServer): - def setUp(self): - self.binary = target.compile("programs/step.S") - self.server = target.server() - self.gdb = testlib.Gdb() - self.gdb.command("file %s" % self.binary) - self.gdb.command("target extended-remote localhost:%d" % self.server.port) +class InterruptTest(GdbSingleHartTest): + compile_args = ("programs/interrupt.c",) + + def early_applicable(self): + return self.target.supports_clint_mtime + + def setup(self): + self.gdb.load() + + def test(self): + self.gdb.b("main") + output = self.gdb.c() + assertIn(" main ", output) + self.gdb.b("trap_entry") + output = self.gdb.c() + assertIn(" trap_entry ", output) + assertEqual(self.gdb.p("$mip") & 0x80, 0x80) + assertEqual(self.gdb.p("interrupt_count"), 0) + # You'd expect local to still be 0, but it looks like spike doesn't + # jump to the interrupt handler immediately after the write to + # mtimecmp. + assertLess(self.gdb.p("local"), 1000) + self.gdb.command("delete breakpoints") + for _ in range(10): + self.gdb.c(wait=False) + time.sleep(2) + self.gdb.interrupt() + interrupt_count = self.gdb.p("interrupt_count") + local = self.gdb.p("local") + if interrupt_count > 1000 and \ + local > 1000: + return + + assertGreater(interrupt_count, 1000) + assertGreater(local, 1000) + + def postMortem(self): + GdbSingleHartTest.postMortem(self) + self.gdb.p("*((long long*) 0x200bff8)") + self.gdb.p("*((long long*) 0x2004000)") + self.gdb.p("interrupt_count") + self.gdb.p("local") + +class MulticoreRegTest(GdbTest): + compile_args = ("programs/infinite_loop.S", "-DMULTICORE") + + def early_applicable(self): + return len(self.target.harts) > 1 + + def setup(self): + self.gdb.load() + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$pc=_start") + + def test(self): + # Run to main + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.b("main") + self.gdb.c() + assertIn("main", self.gdb.where()) + self.gdb.command("delete breakpoints") + + # Run through the entire loop. + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.b("main_end") + self.gdb.c() + assertIn("main_end", self.gdb.where()) + + hart_ids = [] + for hart in self.target.harts: + self.gdb.select_hart(hart) + # Check register values. + hart_id = self.gdb.p("$x1") + assertNotIn(hart_id, hart_ids) + hart_ids.append(hart_id) + for n in range(2, 32): + value = self.gdb.p("$x%d" % n) + assertEqual(value, hart_ids[-1] + n - 1) + + # Confirmed that we read different register values for different harts. + # Write a new value to x1, and run through the add sequence again. + + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$x1=0x%x" % (hart.index * 0x800)) + self.gdb.p("$pc=main_post_csrr") + self.gdb.c() + for hart in self.target.harts: + self.gdb.select_hart(hart) + assertIn("main", self.gdb.where()) + # Check register values. + for n in range(1, 32): + value = self.gdb.p("$x%d" % n) + assertEqual(value, hart.index * 0x800 + n - 1) + +class MulticoreRunHaltStepiTest(GdbTest): + compile_args = ("programs/multicore.c", "-DMULTICORE") + + def early_applicable(self): + return len(self.target.harts) > 1 + + def setup(self): + self.gdb.load() + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$pc=_start") + + def test(self): + previous_hart_count = [0 for h in self.target.harts] + previous_interrupt_count = [0 for h in self.target.harts] + for _ in range(10): + self.gdb.c(wait=False) + time.sleep(2) + self.gdb.interrupt() + self.gdb.p("$mie") + self.gdb.p("$mip") + self.gdb.p("$mstatus") + self.gdb.p("$priv") + self.gdb.p("buf", fmt="") + hart_count = self.gdb.p("hart_count") + interrupt_count = self.gdb.p("interrupt_count") + for i, h in enumerate(self.target.harts): + assertGreater(hart_count[i], previous_hart_count[i]) + assertGreater(interrupt_count[i], previous_interrupt_count[i]) + self.gdb.select_hart(h) + pc = self.gdb.p("$pc") + self.gdb.stepi() + stepped_pc = self.gdb.p("$pc") + assertNotEqual(pc, stepped_pc) + +class StepTest(GdbTest): + compile_args = ("programs/step.S", ) + + def setup(self): self.gdb.load() self.gdb.b("main") self.gdb.c() - def test_step(self): - main = self.gdb.p("$pc") - for expected in (4, 8, 0xc, 0x10, 0x18, 0x1c, 0x28, 0x20, 0x2c, 0x2c): + def test(self): + main_address = self.gdb.p("$pc") + if self.hart.extensionSupported("c"): + sequence = (4, 8, 0xc, 0xe, 0x14, 0x18, 0x22, 0x1c, 0x24, 0x24) + else: + sequence = (4, 8, 0xc, 0x10, 0x18, 0x1c, 0x28, 0x20, 0x2c, 0x2c) + for expected in sequence: self.gdb.stepi() pc = self.gdb.p("$pc") - self.assertEqual("%x" % pc, "%x" % (expected + main)) + assertEqual("%x" % (pc - main_address), "%x" % expected) -class RegsTest(DeleteServer): - def setUp(self): - self.binary = target.compile("programs/regs.S") - self.server = target.server() - self.gdb = testlib.Gdb() - self.gdb.command("file %s" % self.binary) - self.gdb.command("target extended-remote localhost:%d" % self.server.port) +class TriggerTest(GdbTest): + compile_args = ("programs/trigger.S", ) + def setup(self): + self.gdb.load() + self.gdb.b("_exit") + self.gdb.b("main") + self.gdb.c() + + def exit(self): + output = self.gdb.c() + assertIn("Breakpoint", output) + assertIn("_exit", output) + +class TriggerExecuteInstant(TriggerTest): + """Test an execute breakpoint on the first instruction executed out of + debug mode.""" + def test(self): + main_address = self.gdb.p("$pc") + self.gdb.command("hbreak *0x%x" % (main_address + 4)) + self.gdb.c() + assertEqual(self.gdb.p("$pc"), main_address+4) + +# FIXME: Triggers aren't quite working yet +#class TriggerLoadAddress(TriggerTest): +# def test(self): +# self.gdb.command("rwatch *((&data)+1)") +# output = self.gdb.c() +# assertIn("read_loop", output) +# assertEqual(self.gdb.p("$a0"), +# self.gdb.p("(&data)+1")) +# self.exit() + +class TriggerLoadAddressInstant(TriggerTest): + """Test a load address breakpoint on the first instruction executed out of + debug mode.""" + def test(self): + self.gdb.command("b just_before_read_loop") + self.gdb.c() + read_loop = self.gdb.p("&read_loop") + self.gdb.command("rwatch data") + self.gdb.c() + # Accept hitting the breakpoint before or after the load instruction. + assertIn(self.gdb.p("$pc"), [read_loop, read_loop + 4]) + assertEqual(self.gdb.p("$a0"), self.gdb.p("&data")) + +# FIXME: Triggers aren't quite working yet +#class TriggerStoreAddress(TriggerTest): +# def test(self): +# self.gdb.command("watch *((&data)+3)") +# output = self.gdb.c() +# assertIn("write_loop", output) +# assertEqual(self.gdb.p("$a0"), +# self.gdb.p("(&data)+3")) +# self.exit() + +class TriggerStoreAddressInstant(TriggerTest): + def test(self): + """Test a store address breakpoint on the first instruction executed out + of debug mode.""" + self.gdb.command("b just_before_write_loop") + self.gdb.c() + write_loop = self.gdb.p("&write_loop") + self.gdb.command("watch data") + self.gdb.c() + # Accept hitting the breakpoint before or after the store instruction. + assertIn(self.gdb.p("$pc"), [write_loop, write_loop + 4]) + assertEqual(self.gdb.p("$a0"), self.gdb.p("&data")) + +class TriggerDmode(TriggerTest): + def early_applicable(self): + return self.hart.honors_tdata1_hmode + + def check_triggers(self, tdata1_lsbs, tdata2): + dmode = 1 << (self.hart.xlen-5) + + triggers = [] + + if self.hart.xlen == 32: + xlen_type = 'int' + elif self.hart.xlen == 64: + xlen_type = 'long long' + else: + raise NotImplementedError + + dmode_count = 0 + i = 0 + for i in range(16): + tdata1 = self.gdb.p("((%s *)&data)[%d]" % (xlen_type, 2*i)) + if tdata1 == 0: + break + tdata2 = self.gdb.p("((%s *)&data)[%d]" % (xlen_type, 2*i+1)) + + if tdata1 & dmode: + dmode_count += 1 + else: + assertEqual(tdata1 & 0xffff, tdata1_lsbs) + assertEqual(tdata2, tdata2) + + assertGreater(i, 1) + assertEqual(dmode_count, 1) + + return triggers + + def test(self): + self.gdb.command("hbreak write_load_trigger") + self.gdb.b("clear_triggers") + self.gdb.p("$pc=write_store_trigger") + output = self.gdb.c() + assertIn("write_load_trigger", output) + self.check_triggers((1<<6) | (1<<1), 0xdeadbee0) + output = self.gdb.c() + assertIn("clear_triggers", output) + self.check_triggers((1<<6) | (1<<0), 0xfeedac00) + +class RegsTest(GdbTest): + compile_args = ("programs/regs.S", ) + def setup(self): self.gdb.load() self.gdb.b("main") self.gdb.b("handle_trap") self.gdb.c() - def test_write_gprs(self): +class WriteGprs(RegsTest): + def test(self): regs = [("x%d" % n) for n in range(2, 32)] self.gdb.p("$pc=write_regs") for i, r in enumerate(regs): - self.gdb.command("p $%s=%d" % (r, (0xdeadbeef<\n") - download_c.write("unsigned int crc32a(uint8_t *message, unsigned int size);\n") - download_c.write("uint32_t length = %d;\n" % length) - download_c.write("uint8_t d[%d] = {\n" % length) + assertEqual(123, self.gdb.p("$mscratch")) + assertEqual(123, self.gdb.p("$x1")) + assertEqual(123, self.gdb.p("$csr832")) + +class DownloadTest(GdbTest): + def setup(self): + # pylint: disable=attribute-defined-outside-init + length = min(2**10, self.hart.ram_size - 2048) + self.download_c = tempfile.NamedTemporaryFile(prefix="download_", + suffix=".c", delete=False) + self.download_c.write("#include \n") + self.download_c.write( + "unsigned int crc32a(uint8_t *message, unsigned int size);\n") + self.download_c.write("uint32_t length = %d;\n" % length) + self.download_c.write("uint8_t d[%d] = {\n" % length) self.crc = 0 + assert length % 16 == 0 for i in range(length / 16): - download_c.write(" /* 0x%04x */ " % (i * 16)); + self.download_c.write(" /* 0x%04x */ " % (i * 16)) for _ in range(16): value = random.randrange(1<<8) - download_c.write("%d, " % value) + self.download_c.write("0x%02x, " % value) self.crc = binascii.crc32("%c" % value, self.crc) - download_c.write("\n"); - download_c.write("};\n"); - download_c.write("uint8_t *data = &d[0];\n"); - download_c.write("uint32_t main() { return crc32a(data, length); }\n") - download_c.flush() + self.download_c.write("\n") + self.download_c.write("};\n") + self.download_c.write("uint8_t *data = &d[0];\n") + self.download_c.write( + "uint32_t main() { return crc32a(data, length); }\n") + self.download_c.flush() if self.crc < 0: self.crc += 2**32 - self.binary = target.compile(download_c.name, "programs/checksum.c") - self.server = target.server() - self.gdb = testlib.Gdb() + self.binary = self.target.compile(self.hart, self.download_c.name, + "programs/checksum.c") self.gdb.command("file %s" % self.binary) - self.gdb.command("target extended-remote localhost:%d" % self.server.port) - def test_download(self): - output = self.gdb.load() + def test(self): + self.gdb.load() self.gdb.command("b _exit") + self.gdb.c(timeout=60) + assertEqual(self.gdb.p("status"), self.crc) + os.unlink(self.download_c.name) + +#class MprvTest(GdbTest): +# compile_args = ("programs/mprv.S", ) +# def setup(self): +# self.gdb.load() +# +# def test(self): +# """Test that the debugger can access memory when MPRV is set.""" +# self.gdb.c(wait=False) +# time.sleep(0.5) +# self.gdb.interrupt() +# output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)") +# assertIn("0xbead", output) + +class PrivTest(GdbTest): + compile_args = ("programs/priv.S", ) + def setup(self): + # pylint: disable=attribute-defined-outside-init + self.gdb.load() + + misa = self.hart.misa + self.supported = set() + if misa & (1<<20): + self.supported.add(0) + if misa & (1<<18): + self.supported.add(1) + if misa & (1<<7): + self.supported.add(2) + self.supported.add(3) + +class PrivRw(PrivTest): + def test(self): + """Test reading/writing priv.""" + # Disable physical memory protection by allowing U mode access to all + # memory. + self.gdb.p("$pmpcfg0=0xf") # TOR, R, W, X + self.gdb.p("$pmpaddr0=0x%x" % ((self.hart.ram + self.hart.ram_size) >> 2)) + + # Leave the PC at _start, where the first 4 instructions should be + # legal in any mode. + for privilege in range(4): + self.gdb.p("$priv=%d" % privilege) + self.gdb.stepi() + actual = self.gdb.p("$priv") + assertIn(actual, self.supported) + if privilege in self.supported: + assertEqual(actual, privilege) + +class PrivChange(PrivTest): + def test(self): + """Test that the core's privilege level actually changes.""" + + if 0 not in self.supported: + return 'not_applicable' + + self.gdb.b("main") self.gdb.c() - self.assertEqual(self.gdb.p("status"), self.crc) -class MprvTest(DeleteServer): - def setUp(self): - self.binary = target.compile("programs/mprv.S") - self.server = target.server() - self.gdb = testlib.Gdb() - self.gdb.command("file %s" % self.binary) - self.gdb.command("target extended-remote localhost:%d" % self.server.port) - self.gdb.load() + # Machine mode + self.gdb.p("$priv=3") + main_address = self.gdb.p("$pc") + self.gdb.stepi() + assertEqual("%x" % self.gdb.p("$pc"), "%x" % (main_address+4)) - def test_mprv(self): - """Test that the debugger can access memory when MPRV is set.""" - self.gdb.c(wait=False) - time.sleep(0.5) - self.gdb.interrupt() - output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)") - self.assertIn("0xbead", output) - -class Target(object): - directory = None - - def server(self): - raise NotImplementedError - - def compile(self, *sources): - binary_name = "%s_%s" % ( - self.name, - os.path.basename(os.path.splitext(sources[0])[0])) - if parsed.isolate: - self.temporary_binary = tempfile.NamedTemporaryFile( - prefix=binary_name + "_") - binary_name = self.temporary_binary.name - testlib.compile(sources + - ("programs/entry.S", "programs/init.c", - "-I", "../env", - "-T", "targets/%s/link.lds" % (self.directory or self.name), - "-nostartfiles", - "-mcmodel=medany", - "-o", binary_name), - xlen=self.xlen) - return binary_name - -class Spike64Target(Target): - name = "spike" - xlen = 64 - ram = 0x80010000 - ram_size = 5 * 1024 * 1024 - instruction_hardware_breakpoint_count = 0 - reset_vector = 0x1000 - - def server(self): - return testlib.Spike(parsed.cmd, halted=True) - -class Spike32Target(Target): - name = "spike32" - directory = "spike" - xlen = 32 - ram = 0x80010000 - ram_size = 5 * 1024 * 1024 - instruction_hardware_breakpoint_count = 0 - reset_vector = 0x1000 - - def server(self): - return testlib.Spike(parsed.cmd, halted=True, xlen=32) - -class MicroSemiTarget(Target): - name = "m2gl_m2s" - xlen = 32 - ram = 0x80000000 - ram_size = 16 * 1024 - instruction_hardware_breakpoint_count = 2 - - def server(self): - return testlib.Openocd(cmd=parsed.cmd, - config="targets/%s/openocd.cfg" % self.name) - -targets = [ - Spike32Target, - Spike64Target, - MicroSemiTarget - ] + # User mode + self.gdb.p("$priv=0") + self.gdb.stepi() + # Should have taken an exception, so be nowhere near main. + pc = self.gdb.p("$pc") + assertTrue(pc < main_address or pc > main_address + 0x100) +parsed = None def main(): parser = argparse.ArgumentParser( + description="Test that gdb can talk to a RISC-V target.", epilog=""" Example command line from the real world: - Run all RegsTest cases against a MicroSemi m2gl_m2s board, with custom openocd command: - ./gdbserver.py --m2gl_m2s --cmd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl -d" -- -vf RegsTest + Run all RegsTest cases against a physical FPGA, with custom openocd command: + ./gdbserver.py --freedom-e300 --server_cmd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl -d" Simple """) - group = parser.add_mutually_exclusive_group(required=True) - for t in targets: - group.add_argument("--%s" % t.name, action="store_const", const=t, - dest="target") - parser.add_argument("--cmd", - help="The command to use to start the debug server.") - parser.add_argument("--isolate", action="store_true", - help="Try to run in such a way that multiple instances can run at " - "the same time. This may make it harder to debug a failure if it " - "does occur.") - parser.add_argument("unittest", nargs="*") - global parsed + targets.add_target_options(parser) + + testlib.add_test_run_options(parser) + + # TODO: remove global + global parsed # pylint: disable=global-statement parsed = parser.parse_args() + target = targets.target(parsed) + testlib.print_log_names = parsed.print_log_names + + module = sys.modules[__name__] - global target - target = parsed.target() - unittest.main(argv=[sys.argv[0]] + parsed.unittest) + return testlib.run_all_tests(module, target, parsed) # TROUBLESHOOTING TIPS # If a particular test fails, run just that one test, eg.: -# ./tests/gdbserver.py MprvTest.test_mprv +# ./gdbserver.py MprvTest.test_mprv # Then inspect gdb.log and spike.log to see what happened in more detail. if __name__ == '__main__':