X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=debug%2Fgdbserver.py;h=09938d3f1b049b4e44674be4aa901285c6fdff41;hb=4590b79bc7241f3fa2424f96b4c6666a864fb6a9;hp=f506640fbbc2d0cac41e8d7db88c19f38d28cb1b;hpb=5cd2b39a28c2c77debce4b55c140917c55dc1189;p=riscv-tests.git diff --git a/debug/gdbserver.py b/debug/gdbserver.py index f506640..09938d3 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -6,11 +6,13 @@ import random import sys import tempfile import time +import os import targets import testlib from testlib import assertEqual, assertNotEqual, assertIn, assertNotIn -from testlib import assertGreater, assertTrue, assertRegexpMatches +from testlib import assertGreater, assertRegexpMatches, assertLess +from testlib import GdbTest, GdbSingleHartTest, TestFailed, assertTrue MSTATUS_UIE = 0x00000001 MSTATUS_SIE = 0x00000002 @@ -34,30 +36,6 @@ MSTATUS64_SD = 0x8000000000000000 # pylint: disable=abstract-method -def gdb( - target=None, - port=None, - binary=None - ): - - g = None - if parsed.gdb: - g = testlib.Gdb(parsed.gdb) - else: - g = testlib.Gdb() - - if binary: - g.command("file %s" % binary) - if target: - g.command("set arch riscv:rv%d" % target.xlen) - g.command("set remotetimeout %d" % target.timeout_sec) - if port: - g.command("target extended-remote localhost:%d" % port) - - g.p("$priv=3") - - return g - def ihex_line(address, record_type, data): assert len(data) < 128 line = ":%02X%04X%02X" % (len(data), address, record_type) @@ -86,66 +64,80 @@ def ihex_parse(line): def readable_binary_string(s): return "".join("%02x" % ord(c) for c in s) -class GdbTest(testlib.BaseTest): - def __init__(self, target): - testlib.BaseTest.__init__(self, target) - self.gdb = None - - def classSetup(self): - testlib.BaseTest.classSetup(self) - self.logs.append("gdb.log") - self.gdb = gdb(self.target, self.server.port, self.binary) - - def classTeardown(self): - del self.gdb - testlib.BaseTest.classTeardown(self) - class SimpleRegisterTest(GdbTest): - def check_reg(self, name): - a = random.randrange(1< 1000 and \ + local > 1000: + return + + assertGreater(interrupt_count, 1000) + assertGreater(local, 1000) + + def postMortem(self): + GdbSingleHartTest.postMortem(self) + self.gdb.p("*((long long*) 0x200bff8)") + self.gdb.p("*((long long*) 0x2004000)") + self.gdb.p("interrupt_count") + self.gdb.p("local") + +class MulticoreRegTest(GdbTest): + compile_args = ("programs/infinite_loop.S", "-DMULTICORE") + + def early_applicable(self): + return len(self.target.harts) > 1 + + def setup(self): + self.gdb.load() + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$pc=_start") + + def test(self): + # Run to main + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.b("main") + self.gdb.c() + assertIn("main", self.gdb.where()) + self.gdb.command("delete breakpoints") + + # Run through the entire loop. + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.b("main_end") + self.gdb.c() + assertIn("main_end", self.gdb.where()) + + hart_ids = [] + for hart in self.target.harts: + self.gdb.select_hart(hart) + # Check register values. + hart_id = self.gdb.p("$x1") + assertNotIn(hart_id, hart_ids) + hart_ids.append(hart_id) + for n in range(2, 32): + value = self.gdb.p("$x%d" % n) + assertEqual(value, hart_ids[-1] + n - 1) + + # Confirmed that we read different register values for different harts. + # Write a new value to x1, and run through the add sequence again. + + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$x1=0x%x" % (hart.index * 0x800)) + self.gdb.p("$pc=main_post_csrr") + self.gdb.c() + for hart in self.target.harts: + self.gdb.select_hart(hart) + assertIn("main", self.gdb.where()) + # Check register values. + for n in range(1, 32): + value = self.gdb.p("$x%d" % n) + assertEqual(value, hart.index * 0x800 + n - 1) + +class MulticoreRunHaltStepiTest(GdbTest): + compile_args = ("programs/multicore.c", "-DMULTICORE") + + def early_applicable(self): + return len(self.target.harts) > 1 + + def setup(self): + self.gdb.load() + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$pc=_start") + + def test(self): + previous_hart_count = [0 for h in self.target.harts] + previous_interrupt_count = [0 for h in self.target.harts] + for _ in range(10): + self.gdb.c(wait=False) + time.sleep(2) + self.gdb.interrupt() + self.gdb.p("$mie") + self.gdb.p("$mip") + self.gdb.p("$mstatus") + self.gdb.p("$priv") + self.gdb.p("buf", fmt="") + hart_count = self.gdb.p("hart_count") + interrupt_count = self.gdb.p("interrupt_count") + for i, h in enumerate(self.target.harts): + assertGreater(hart_count[i], previous_hart_count[i]) + assertGreater(interrupt_count[i], previous_interrupt_count[i]) + self.gdb.select_hart(h) + pc = self.gdb.p("$pc") + self.gdb.stepi() + stepped_pc = self.gdb.p("$pc") + assertNotEqual(pc, stepped_pc) + class StepTest(GdbTest): compile_args = ("programs/step.S", ) @@ -414,10 +573,14 @@ class StepTest(GdbTest): def test(self): main_address = self.gdb.p("$pc") - for expected in (4, 8, 0xc, 0x10, 0x18, 0x1c, 0x28, 0x20, 0x2c, 0x2c): + if self.hart.extensionSupported("c"): + sequence = (4, 8, 0xc, 0xe, 0x14, 0x18, 0x22, 0x1c, 0x24, 0x24) + else: + sequence = (4, 8, 0xc, 0x10, 0x18, 0x1c, 0x28, 0x20, 0x2c, 0x2c) + for expected in sequence: self.gdb.stepi() pc = self.gdb.p("$pc") - assertEqual("%x" % pc, "%x" % (expected + main_address)) + assertEqual("%x" % (pc - main_address), "%x" % expected) class TriggerTest(GdbTest): compile_args = ("programs/trigger.S", ) @@ -441,14 +604,15 @@ class TriggerExecuteInstant(TriggerTest): self.gdb.c() assertEqual(self.gdb.p("$pc"), main_address+4) -class TriggerLoadAddress(TriggerTest): - def test(self): - self.gdb.command("rwatch *((&data)+1)") - output = self.gdb.c() - assertIn("read_loop", output) - assertEqual(self.gdb.p("$a0"), - self.gdb.p("(&data)+1")) - self.exit() +# FIXME: Triggers aren't quite working yet +#class TriggerLoadAddress(TriggerTest): +# def test(self): +# self.gdb.command("rwatch *((&data)+1)") +# output = self.gdb.c() +# assertIn("read_loop", output) +# assertEqual(self.gdb.p("$a0"), +# self.gdb.p("(&data)+1")) +# self.exit() class TriggerLoadAddressInstant(TriggerTest): """Test a load address breakpoint on the first instruction executed out of @@ -463,14 +627,15 @@ class TriggerLoadAddressInstant(TriggerTest): assertIn(self.gdb.p("$pc"), [read_loop, read_loop + 4]) assertEqual(self.gdb.p("$a0"), self.gdb.p("&data")) -class TriggerStoreAddress(TriggerTest): - def test(self): - self.gdb.command("watch *((&data)+3)") - output = self.gdb.c() - assertIn("write_loop", output) - assertEqual(self.gdb.p("$a0"), - self.gdb.p("(&data)+3")) - self.exit() +# FIXME: Triggers aren't quite working yet +#class TriggerStoreAddress(TriggerTest): +# def test(self): +# self.gdb.command("watch *((&data)+3)") +# output = self.gdb.c() +# assertIn("write_loop", output) +# assertEqual(self.gdb.p("$a0"), +# self.gdb.p("(&data)+3")) +# self.exit() class TriggerStoreAddressInstant(TriggerTest): def test(self): @@ -486,14 +651,17 @@ class TriggerStoreAddressInstant(TriggerTest): assertEqual(self.gdb.p("$a0"), self.gdb.p("&data")) class TriggerDmode(TriggerTest): + def early_applicable(self): + return self.hart.honors_tdata1_hmode + def check_triggers(self, tdata1_lsbs, tdata2): - dmode = 1 << (self.target.xlen-5) + dmode = 1 << (self.hart.xlen-5) triggers = [] - if self.target.xlen == 32: + if self.hart.xlen == 32: xlen_type = 'int' - elif self.target.xlen == 64: + elif self.hart.xlen == 64: xlen_type = 'long long' else: raise NotImplementedError @@ -553,7 +721,7 @@ class WriteGprs(RegsTest): self.gdb.command("info registers") for n in range(len(regs)): assertEqual(self.gdb.x("data+%d" % (8*n), 'g'), - ((0xdeadbeef<\n") - download_c.write( + length = min(2**10, self.hart.ram_size - 2048) + self.download_c = tempfile.NamedTemporaryFile(prefix="download_", + suffix=".c", delete=False) + self.download_c.write("#include \n") + self.download_c.write( "unsigned int crc32a(uint8_t *message, unsigned int size);\n") - download_c.write("uint32_t length = %d;\n" % length) - download_c.write("uint8_t d[%d] = {\n" % length) + self.download_c.write("uint32_t length = %d;\n" % length) + self.download_c.write("uint8_t d[%d] = {\n" % length) self.crc = 0 + assert length % 16 == 0 for i in range(length / 16): - download_c.write(" /* 0x%04x */ " % (i * 16)) + self.download_c.write(" /* 0x%04x */ " % (i * 16)) for _ in range(16): value = random.randrange(1<<8) - download_c.write("%d, " % value) + self.download_c.write("0x%02x, " % value) self.crc = binascii.crc32("%c" % value, self.crc) - download_c.write("\n") - download_c.write("};\n") - download_c.write("uint8_t *data = &d[0];\n") - download_c.write("uint32_t main() { return crc32a(data, length); }\n") - download_c.flush() + self.download_c.write("\n") + self.download_c.write("};\n") + self.download_c.write("uint8_t *data = &d[0];\n") + self.download_c.write( + "uint32_t main() { return crc32a(data, length); }\n") + self.download_c.flush() if self.crc < 0: self.crc += 2**32 - self.binary = self.target.compile(download_c.name, + self.binary = self.target.compile(self.hart, self.download_c.name, "programs/checksum.c") self.gdb.command("file %s" % self.binary) def test(self): self.gdb.load() self.gdb.command("b _exit") - self.gdb.c() + self.gdb.c(timeout=60) assertEqual(self.gdb.p("status"), self.crc) - -class MprvTest(GdbTest): - compile_args = ("programs/mprv.S", ) - def setup(self): - self.gdb.load() - - def test(self): - """Test that the debugger can access memory when MPRV is set.""" - self.gdb.c(wait=False) - time.sleep(0.5) - self.gdb.interrupt() - output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)") - assertIn("0xbead", output) + os.unlink(self.download_c.name) + +#class MprvTest(GdbTest): +# compile_args = ("programs/mprv.S", ) +# def setup(self): +# self.gdb.load() +# +# def test(self): +# """Test that the debugger can access memory when MPRV is set.""" +# self.gdb.c(wait=False) +# time.sleep(0.5) +# self.gdb.interrupt() +# output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)") +# assertIn("0xbead", output) class PrivTest(GdbTest): compile_args = ("programs/priv.S", ) @@ -630,7 +801,7 @@ class PrivTest(GdbTest): # pylint: disable=attribute-defined-outside-init self.gdb.load() - misa = self.gdb.p("$misa") + misa = self.hart.misa self.supported = set() if misa & (1<<20): self.supported.add(0) @@ -643,6 +814,13 @@ class PrivTest(GdbTest): class PrivRw(PrivTest): def test(self): """Test reading/writing priv.""" + # Disable physical memory protection by allowing U mode access to all + # memory. + self.gdb.p("$pmpcfg0=0xf") # TOR, R, W, X + self.gdb.p("$pmpaddr0=0x%x" % ((self.hart.ram + self.hart.ram_size) >> 2)) + + # Leave the PC at _start, where the first 4 instructions should be + # legal in any mode. for privilege in range(4): self.gdb.p("$priv=%d" % privilege) self.gdb.stepi() @@ -681,25 +859,21 @@ def main(): epilog=""" Example command line from the real world: Run all RegsTest cases against a physical FPGA, with custom openocd command: - ./gdbserver.py --freedom-e300 --cmd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl -d" Simple + ./gdbserver.py --freedom-e300 --server_cmd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl -d" Simple """) targets.add_target_options(parser) - parser.add_argument("--gdb", - help="The command to use to start gdb.") testlib.add_test_run_options(parser) # TODO: remove global global parsed # pylint: disable=global-statement parsed = parser.parse_args() - - target = parsed.target(parsed.cmd, parsed.run, parsed.isolate) - if parsed.xlen: - target.xlen = parsed.xlen + target = targets.target(parsed) + testlib.print_log_names = parsed.print_log_names module = sys.modules[__name__] - return testlib.run_all_tests(module, target, parsed.test, parsed.fail_fast) + return testlib.run_all_tests(module, target, parsed) # TROUBLESHOOTING TIPS # If a particular test fails, run just that one test, eg.: