X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=debug%2Fgdbserver.py;h=d7092a8aaf62e28ac9b18e5ba909128634fcc20f;hb=30b70b7ed988fa06ab423e05b272898a1527ba11;hp=f2c84ae1b9b0670411c4259fb0b7711ec70dbc4d;hpb=cc4fb603a4c6c1c1ba92262763b68bbb91092ed3;p=riscv-tests.git diff --git a/debug/gdbserver.py b/debug/gdbserver.py index f2c84ae..d7092a8 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -106,23 +106,26 @@ class SimpleT1Test(SimpleRegisterTest): class SimpleF18Test(SimpleRegisterTest): def check_reg(self, name, alias): - self.gdb.p_raw("$mstatus=$mstatus | 0x00006000") - self.gdb.stepi() - a = random.random() - b = random.random() - self.gdb.p_raw("$%s=%f" % (name, a)) - assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001) - self.gdb.stepi() - assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - a), .001) - assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001) - self.gdb.p_raw("$%s=%f" % (alias, b)) - assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001) - self.gdb.stepi() - assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001) - assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - b), .001) - - def early_applicable(self): - return self.hart.extensionSupported('F') + if self.hart.extensionSupported('F'): + self.gdb.p_raw("$mstatus=$mstatus | 0x00006000") + self.gdb.stepi() + a = random.random() + b = random.random() + self.gdb.p_raw("$%s=%f" % (name, a)) + assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001) + self.gdb.stepi() + assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - a), .001) + assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001) + self.gdb.p_raw("$%s=%f" % (alias, b)) + assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001) + self.gdb.stepi() + assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001) + assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - b), .001) + else: + output = self.gdb.p_raw("$" + name) + assertEqual(output, "void") + output = self.gdb.p_raw("$" + alias) + assertEqual(output, "void") def test(self): self.check_reg("f18", "fs2") @@ -396,6 +399,8 @@ class Registers(DebugTest): output = self.gdb.command(cmd) for reg in ('zero', 'ra', 'sp', 'gp', 'tp'): assertIn(reg, output) + for line in output.splitlines(): + assertRegexpMatches(line, r"^\S") #TODO # mcpuid is one of the few registers that should have the high bit set @@ -814,6 +819,14 @@ class PrivTest(GdbTest): class PrivRw(PrivTest): def test(self): """Test reading/writing priv.""" + # Disable physical memory protection by allowing U mode access to all + # memory. + self.gdb.p("$pmpcfg0=0xf") # TOR, R, W, X + self.gdb.p("$pmpaddr0=0x%x" % + ((self.hart.ram + self.hart.ram_size) >> 2)) + + # Leave the PC at _start, where the first 4 instructions should be + # legal in any mode. for privilege in range(4): self.gdb.p("$priv=%d" % privilege) self.gdb.stepi() @@ -862,9 +875,7 @@ def main(): global parsed # pylint: disable=global-statement parsed = parser.parse_args() target = targets.target(parsed) - - if parsed.xlen: - target.xlen = parsed.xlen + testlib.print_log_names = parsed.print_log_names module = sys.modules[__name__]