X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=debug%2Ftargets%2Ffreedom-u500-sim%2Fopenocd.cfg;h=9239c83ddde91c20de939040bee122b3ab03292a;hb=69b1dda5d9b184ff39d4e9c134f66a5bfe5bcef6;hp=0b808858a410a53f876d02fec4a5fc42c52e42e2;hpb=2f4a65844606861aa2aec43db9a49997d0e02a5f;p=riscv-tests.git

diff --git a/debug/targets/freedom-u500-sim/openocd.cfg b/debug/targets/freedom-u500-sim/openocd.cfg
index 0b80885..9239c83 100644
--- a/debug/targets/freedom-u500-sim/openocd.cfg
+++ b/debug/targets/freedom-u500-sim/openocd.cfg
@@ -2,13 +2,15 @@ adapter_khz     10000
 
 source [find interface/jtag_vpi.cfg]
 jtag_vpi_set_port $::env(JTAG_VPI_PORT)
+#jtag_vpi_set_port 44005
 
 set _CHIPNAME riscv
 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
 
 init
 
 halt
+echo "OK GO NOW"