X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa%2Frv64si%2Fcsr.S;h=292e298608b8816def05c98ff14a46c898811c4e;hb=bb14a75c0b938dcbb308a5304ea0c3f30c3fceef;hp=13dbf2679545f9dda98bc74bad2d317486131c40;hpb=f7bb852141c107722bdb0302d11b6f992a6991d5;p=riscv-tests.git

diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index 13dbf26..292e298 100644
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -24,6 +24,27 @@ RVTEST_CODE_BEGIN
   #define SSTATUS_SPP MSTATUS_MPP
 #endif
 
+  # For RV64, make sure UXL encodes RV64.  (UXL does not exist for RV32.)
+#if __riscv_xlen == 64
+  # If running in M mode, read misa to check existence of U mode.
+  # Otherwise, if in S mode, then U mode must exist and we don't need to check.
+#ifdef __MACHINE_MODE
+  csrr a0, misa
+  srli a0, a0, 'U' - 'A'
+  andi a0, a0, 1
+  beqz a0, 1f
+#endif
+  # If U mode is present, UXL should be 2 (XLEN = 64-bit)
+  TEST_CASE(13, a0, SSTATUS_UXL & (SSTATUS_UXL << 1), csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
+#ifdef __MACHINE_MODE
+  j 2f
+1:
+  # If U mode is not present, UXL should be 0
+  TEST_CASE(14, a0, 0, csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
+2:
+#endif
+#endif
+
   csrwi sscratch, 3
   TEST_CASE( 2, a0,         3, csrr a0, sscratch);
   TEST_CASE( 3, a1,         3, csrrci a1, sscratch, 1);
@@ -42,10 +63,15 @@ RVTEST_CODE_BEGIN
   # If so, make sure FP stores have no effect when mstatus.FS is off.
   li a1, MSTATUS_FS
   csrs mstatus, a1
+#ifdef __riscv_flen
   fmv.s.x f0, x0
   csrc mstatus, a1
   la a1, fsw_data
   TEST_CASE(10, a0, 1, fsw f0, (a1); lw a0, (a1));
+#else
+  # Fail if this test is compiled without F but executed on a core with F.
+  TEST_CASE(10, zero, 1)
+#endif
 1:
 
   # Figure out if 'U' is set in misa
@@ -53,7 +79,7 @@ RVTEST_CODE_BEGIN
   srli a0, a0, 20 # a0 = a0 >> 20
   andi a0, a0, 1  # a0 = a0 & 1
   beqz a0, finish # if no user mode, skip the rest of these checks
-#endif
+#endif /* __MACHINE_MODE */
 
   # jump to user land
   li t0, SSTATUS_SPP