X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa%2Frv64ui%2Fsv_addi.S;h=c0fdb5abbeaaba2454aa217ad634890cea2f9951;hb=e2e75e127edd203d4c31b0ff5d9dc6170e42d71b;hp=b73db85a31c71660265897cc16f018842c04d91f;hpb=cda71959b26639a7398b600cbb45b91c55e0f38d;p=riscv-tests.git

diff --git a/isa/rv64ui/sv_addi.S b/isa/rv64ui/sv_addi.S
index b73db85..c0fdb5a 100644
--- a/isa/rv64ui/sv_addi.S
+++ b/isa/rv64ui/sv_addi.S
@@ -24,8 +24,8 @@ RVTEST_CODE_BEGIN   # Start of test code.
         addi    x3, x3, 1
 
         CLR_SV_CSRS()
-        SET_SV_VL(0)
-        SET_SV_MVL(0)
+        SET_SV_VL(1)
+        SET_SV_MVL(1)
 
         TEST_SV_IMM(x2, 1001) # should not be modified
         TEST_SV_IMM(x3, 42)