X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa%2Frv64ui%2Fsv_addi_scalar_src.S;h=182b2ae19eeab86f5693cc907ab5ec5239e488ad;hb=ee5c8e9acfbbcf47cf131612dcc384975b399d2d;hp=fda4e0c551aecdb90580060bdd406f3d1c661489;hpb=6434d21796630d8fc3bf5288ed2eacc1bb303dbd;p=riscv-tests.git

diff --git a/isa/rv64ui/sv_addi_scalar_src.S b/isa/rv64ui/sv_addi_scalar_src.S
index fda4e0c..182b2ae 100644
--- a/isa/rv64ui/sv_addi_scalar_src.S
+++ b/isa/rv64ui/sv_addi_scalar_src.S
@@ -15,16 +15,16 @@ RVTEST_RV64U        # Define TVM used by program.
 # Test code region.
 RVTEST_CODE_BEGIN   # Start of test code.
 
-        SV_LD_DATA( x2, testdata   , 0)
-        SV_LD_DATA( x5, testdata+24, 0)
+        SV_LD_DATA( x2, testdata   , 0) # not expecting this to be modified
+        SV_LD_DATA( x5, testdata+24, 0) # not expecting this to be modified
 
-        li x6, 41
+        li x6, 41 # going to be stored in x3 *and* x4 (plus one, on each)
 
         SET_SV_MVL(2)
         SET_SV_CSR(1, 3, 0, 3, 1, 0)
         SET_SV_VL(2)
 
-        addi    x3, x6, 1
+        addi    x3, x6, 1 # x3 = x6+1 *AND* x4 = x6+1
 
         CLR_SV_CSRS()
         SET_SV_VL(0)