X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa%2Frv64ui%2Fsv_addi_scalar_src.S;h=fda4e0c551aecdb90580060bdd406f3d1c661489;hb=6434d21796630d8fc3bf5288ed2eacc1bb303dbd;hp=2d1e974acdcfd16d8def35142362a954fe983a10;hpb=ecf9aeea425a1978b7ac9aa9e41e68af66693d52;p=riscv-tests.git

diff --git a/isa/rv64ui/sv_addi_scalar_src.S b/isa/rv64ui/sv_addi_scalar_src.S
index 2d1e974..fda4e0c 100644
--- a/isa/rv64ui/sv_addi_scalar_src.S
+++ b/isa/rv64ui/sv_addi_scalar_src.S
@@ -4,7 +4,9 @@
 RVTEST_RV64U        # Define TVM used by program.
 
 
-# SV test: sets up x6 data as a scalar, sets VL to 2, and carries out
+# SV test: scalar-to-vector add
+#
+# sets up x6 data as a scalar, sets VL to 2, and carries out
 # an "add 1 to x6 and store in x3".
 # which actually means:
 # "add add 1 to x6 and store in x3" *AND*