X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa_conflict_resolution.mdwn;h=8125aa392c63c24b80d0768376037d794ade3966;hb=d9abaf326f14a84687aebd021f02ae8aa0225cc1;hp=b0a14fcde5f96ffda158311f6f03de728af9f622;hpb=45aea8c5394b363edd79c0c28203d0f2f11b99eb;p=libreriscv.git diff --git a/isa_conflict_resolution.mdwn b/isa_conflict_resolution.mdwn index b0a14fcde..8125aa392 100644 --- a/isa_conflict_resolution.mdwn +++ b/isa_conflict_resolution.mdwn @@ -564,6 +564,21 @@ The following conversation exerpts are taken from the ISA-dev discussion > non-standard extensions provided it does not claim to implement that > standard extension. +## (6) Clarification of difference between assembler and encodings + +> > The extensible assembler database I proposed assumes that each processor +> > will have *one* and *only* one set of recognized instructions.  (The "hidden +> > prefix" is the immutable vendor/arch/impl tuple in my proposals.)  +> +>  ah this is an extremely important thing to clarify, the difference +> between the recognised instruction assembly mnemonic (which must be +> globally world-wide accepted as canonical) and the binary-level encodings +> of that mnemonic used different vendor implementations which will most +> definitely *not* be unique but require "registration" in the form of +> atomic acceptance as a patch by the FSF to gcc and binutils [and other +> compiler tools]. + + # References *