X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fexecute.cc;h=9d1fb87ad2da6a8cccca13eb3f01e5ff61147ac4;hb=1da69b975beeda193d5fa47950be5883ca20ad13;hp=b302daac78b8f29b83df6945314c9f665ecc588e;hpb=64947480de005d94fb979260eff5751ca5b7d88d;p=riscv-isa-sim.git

diff --git a/riscv/execute.cc b/riscv/execute.cc
index b302daa..9d1fb87 100644
--- a/riscv/execute.cc
+++ b/riscv/execute.cc
@@ -113,7 +113,6 @@ void processor_t::step(size_t n)
          default: abort(); \
        } \
        pc = state.pc; \
-       check_pc_alignment(pc); \
        break; \
      } else { \
        state.pc = pc; \