X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Fc_fld.h;h=319615b8e4303bf952cd0306a526f8d7fa68f5cd;hb=d6fce459767509249311a120fddb21c844dc9b2c;hp=10d14f86075f5385471757a523f9cdd5357e4458;hpb=5f494a22db29d69893db4b39f488cf67c0ac6437;p=riscv-isa-sim.git

diff --git a/riscv/insns/c_fld.h b/riscv/insns/c_fld.h
index 10d14f8..319615b 100644
--- a/riscv/insns/c_fld.h
+++ b/riscv/insns/c_fld.h
@@ -1,4 +1,4 @@
 require_extension('C');
 require_extension('D');
 require_fp;
-WRITE_RVC_FRS2S(MMU.load_int64(RVC_RS1S + insn.rvc_ld_imm()));
+WRITE_RVC_FRS2S(f64(MMU.load_uint64(RVC_RS1S + insn.rvc_ld_imm())));