X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Fc_sd.h;h=9262d044792c94947d234af5d1d73136fe25ac98;hb=c4350ef6ef6259e48509e125fd2d051969dc6efa;hp=13de934cf99fc40e899268a613b69801f20b3f90;hpb=d9d73d80c1b738b3b30eb40d192f61cbdb0e201f;p=riscv-isa-sim.git

diff --git a/riscv/insns/c_sd.h b/riscv/insns/c_sd.h
index 13de934..9262d04 100644
--- a/riscv/insns/c_sd.h
+++ b/riscv/insns/c_sd.h
@@ -1,3 +1,3 @@
-require_rvc;
+require_extension('C');
 require_rv64;
 MMU.store_uint64(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S);