X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Fc_slli.h;h=de3683b9e4a547d77b11f0ce270dffa87c01dca5;hb=c4350ef6ef6259e48509e125fd2d051969dc6efa;hp=fb6dffd3a331a2f88dec85b23415eccc42b10093;hpb=d9d73d80c1b738b3b30eb40d192f61cbdb0e201f;p=riscv-isa-sim.git

diff --git a/riscv/insns/c_slli.h b/riscv/insns/c_slli.h
index fb6dffd..de3683b 100644
--- a/riscv/insns/c_slli.h
+++ b/riscv/insns/c_slli.h
@@ -1,4 +1,4 @@
-require_rvc;
+require_extension('C');
 if (insn.rvc_imm() >= xlen)
   throw trap_illegal_instruction();
 WRITE_RD(sext_xlen(RVC_RS2 << insn.rvc_imm()));