X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Fc_srai.h;h=7b594e9ef1f48cccc2262aa4e28e9d0f8aed8b57;hb=be0555d585b332fd0496affe559c0a5a4e7e5644;hp=aa33424891070209937b7d0471b252a53fb4f8a7;hpb=77452a26e7d95d29dbaa797595ae683f03a3345b;p=riscv-isa-sim.git

diff --git a/riscv/insns/c_srai.h b/riscv/insns/c_srai.h
index aa33424..7b594e9 100644
--- a/riscv/insns/c_srai.h
+++ b/riscv/insns/c_srai.h
@@ -1,5 +1,3 @@
-require_rvc;
-if(xpr64)
-  CRDS = sreg_t(CRDS) >> CIMM5U;
-else
-  CRDS = sext32(int32_t(CRDS) >> CIMM5U);
+require_extension('C');
+require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0);
+WRITE_RVC_RS1S(sext_xlen(sext_xlen(RVC_RS1S) >> insn.rvc_zimm()));