X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Fcsrrsi.h;h=b673725b54d1cbc8eb0a4e27e4af7d6563eb45b6;hb=4299874ad4b07ef457776513a64e5b2397a6a75e;hp=99d323bccf4d46d79afa390a18172436bb4e956b;hpb=aedcd67ac8133ea71de7ff37b772c1533b038c93;p=riscv-isa-sim.git

diff --git a/riscv/insns/csrrsi.h b/riscv/insns/csrrsi.h
index 99d323b..b673725 100644
--- a/riscv/insns/csrrsi.h
+++ b/riscv/insns/csrrsi.h
@@ -1,2 +1,8 @@
-int csr = validate_csr(insn.i_imm(), true);
-WRITE_RD(p->set_pcr(csr, p->get_pcr(csr) | insn.rs1()));
+bool write = insn.rs1() != 0;
+int csr = validate_csr(insn.csr(), write);
+reg_t old = p->get_csr(csr);
+if (write) {
+  p->set_csr(csr, old | insn.rs1());
+}
+WRITE_RD(sext_xlen(old));
+serialize();