X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Ffmul_s.h;h=284aeb399edf77863f98784336c31f6c643ab739;hb=c4350ef6ef6259e48509e125fd2d051969dc6efa;hp=f564803475ca4cb6b78f324b140793e288138470;hpb=d9d73d80c1b738b3b30eb40d192f61cbdb0e201f;p=riscv-isa-sim.git

diff --git a/riscv/insns/fmul_s.h b/riscv/insns/fmul_s.h
index f564803..284aeb3 100644
--- a/riscv/insns/fmul_s.h
+++ b/riscv/insns/fmul_s.h
@@ -1,3 +1,4 @@
+require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_FRD(f32_mulAdd(FRS1, FRS2, (FRS1 ^ FRS2) & (uint32_t)INT32_MIN));