X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fmmu.h;h=4380448f955f73ff4e51f956ad43164076153bec;hb=d6fcfdebf6a893bf37670fd67203d18653df4a0e;hp=f0bc19d1f546b47a999e63b61d46654da97d86a8;hpb=403438d6096f4a6bf0ff924f60940acf51c529a5;p=riscv-isa-sim.git

diff --git a/riscv/mmu.h b/riscv/mmu.h
index f0bc19d..4380448 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -7,7 +7,7 @@
 #include "trap.h"
 #include "common.h"
 #include "config.h"
-#include "sim.h"
+#include "simif.h"
 #include "processor.h"
 #include "memtracer.h"
 #include <stdlib.h>
@@ -239,6 +239,24 @@ public:
 
   void register_memtracer(memtracer_t*);
 
+  int is_dirty_enabled()
+  {
+#ifdef RISCV_ENABLE_DIRTY
+    return 1;
+#else
+    return 0;
+#endif
+  }
+
+  int is_misaligned_enabled()
+  {
+#ifdef RISCV_ENABLE_MISALIGNED
+    return 1;
+#else
+    return 0;
+#endif
+  }
+
 private:
   simif_t* sim;
   processor_t* proc;