X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Friscv.mk.in;h=c7d84f794559b48dc7ab76c5b2a93b909f3966b4;hb=9f1ea45e416eb6b1fc880713f730d9870ea2634c;hp=18d91c569433d2543f34724c4f342f6f0c3cd535;hpb=111434f61a1c907b6a25dbc132ba59a9369ad8d0;p=riscv-isa-sim.git

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 18d91c5..c7d84f7 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -24,6 +24,7 @@ riscv_hdrs = \
 	rocc.h \
 	insn_template.h \
 	mulhi.h \
+	gdbserver.h \
 
 riscv_precompiled_hdrs = \
 	insn_template.h \
@@ -45,6 +46,7 @@ riscv_srcs = \
 	devices.cc \
 	rom.cc \
 	rtc.cc \
+	gdbserver.cc \
 	$(riscv_gen_srcs) \
 
 riscv_test_srcs =