X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fsim.cc;h=793a2c871e6267439c88b1a5c2da7d289495c232;hb=f8a83a80525264761a982cdb4074cb09ac72d7de;hp=42d60a13266d6fcafa1503e952e54b4a1e641ecf;hpb=b3caeee9858b3417d4110b921305c441d3c87653;p=riscv-isa-sim.git

diff --git a/riscv/sim.cc b/riscv/sim.cc
index 42d60a1..793a2c8 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -25,7 +25,7 @@ static void handle_signal(int sig)
 
 sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
              std::vector<std::pair<reg_t, mem_t*>> mems,
-             const std::vector<std::string>& args)
+             const std::vector<std::string>& args, std::vector<int> const hartids)
   : htif_t(args), debug_module(this), mems(mems), procs(std::max(nprocs, size_t(1))),
     start_pc(start_pc),
     current_step(0), current_proc(0), debug(false), remote_bitbang(NULL)
@@ -39,8 +39,19 @@ sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
 
   debug_mmu = new mmu_t(this, NULL);
 
-  for (size_t i = 0; i < procs.size(); i++) {
-    procs[i] = new processor_t(isa, this, i, halted);
+  if (hartids.size() == 0) {
+    for (size_t i = 0; i < procs.size(); i++) {
+      procs[i] = new processor_t(isa, this, i, halted);
+    }
+  }
+  else {
+    if (hartids.size() != procs.size()) {
+      std::cerr << "Number of specified hartids doesn't match number of processors" << strerror(errno) << std::endl;
+      exit(1);
+    }
+    for (size_t i = 0; i < procs.size(); i++) {
+      procs[i] = new processor_t(isa, this, hartids[i], halted);
+    }
   }
 
   clint.reset(new clint_t(procs));
@@ -229,20 +240,18 @@ void sim_t::make_dtb()
   const int reset_vec_size = 8;
 
   start_pc = start_pc == reg_t(-1) ? get_entry_point() : start_pc;
-  reg_t pc_delta = start_pc - DEFAULT_RSTVEC;
-  reg_t pc_delta_hi = (pc_delta + 0x800U) & ~reg_t(0xfffU);
-  reg_t pc_delta_lo = pc_delta - pc_delta_hi;
-  if ((pc_delta_hi >> 31) != 0 && (pc_delta_hi >> 31) != reg_t(-1) >> 31) {
-    fprintf(stderr, "initial pc %" PRIx64 " out of range\n", pc_delta);
-    abort();
-  }
 
   uint32_t reset_vec[reset_vec_size] = {
-    0x297 + uint32_t(pc_delta_hi),              // auipc t0, &pc
-    0x597,                                      // auipc a1, &dtb
-    0x58593 + ((reset_vec_size - 1) * 4 << 20), // addi a1, a1, &dtb
-    0xf1402573,                                 // csrr a0, mhartid
-    0x28067 + uint32_t(pc_delta_lo << 20)       // jalr zero, t0, &pc
+    0x297,                                      // auipc  t0,0x0
+    0x28593 + (reset_vec_size * 4 << 20),       // addi   a1, t0, &dtb
+    0xf1402573,                                 // csrr   a0, mhartid
+    get_core(0)->xlen == 32 ?
+      0x0182a283u :                             // lw     t0,24(t0)
+      0x0182b283u,                              // ld     t0,24(t0)
+    0x28067,                                    // jr     t0
+    0,
+    (uint32_t) (start_pc & 0xffffffff),
+    (uint32_t) (start_pc >> 32)
   };
 
   std::vector<char> rom((char*)reset_vec, (char*)reset_vec + sizeof(reset_vec));
@@ -302,6 +311,9 @@ void sim_t::make_dtb()
                      " 0x" << (clintsz >> 32) << " 0x" << (clintsz & (uint32_t)-1) << ">;\n"
          "    };\n"
          "  };\n"
+         "  htif {\n"
+         "    compatible = \"ucb,htif0\";\n"
+         "  };\n"
          "};\n";
 
   dts = s.str();