X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fsim.cc;h=86e23b0908650b7ac45caf6a336cc3fc000bf369;hb=d1f2cf337e1a0be8eada2afadd745e1374b4a000;hp=b455105913531b40712627634f38dad243ef4a62;hpb=e9e30598e08e4f162b523f9ef07f1510f3cfe0a6;p=riscv-isa-sim.git diff --git a/riscv/sim.cc b/riscv/sim.cc index b455105..86e23b0 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -2,7 +2,7 @@ #include "sim.h" #include "mmu.h" -#include "gdbserver.h" +#include "remote_bitbang.h" #include #include #include @@ -23,7 +23,7 @@ static void handle_signal(int sig) sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted, const std::vector& args) : htif_t(args), procs(std::max(nprocs, size_t(1))), - current_step(0), current_proc(0), debug(false), gdbserver(NULL) + current_step(0), current_proc(0), debug(false), remote_bitbang(NULL) { signal(SIGINT, &handle_signal); // allocate target machine's memory, shrinking it as necessary @@ -77,8 +77,8 @@ void sim_t::main() interactive(); else step(INTERLEAVE); - if (gdbserver) { - gdbserver->handle(); + if (remote_bitbang) { + remote_bitbang->tick(); } } }