X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fsim.h;h=ca1ad6f544b9fb100f741f8340ad2d234574625c;hb=c4350ef6ef6259e48509e125fd2d051969dc6efa;hp=9e1362e08343ad5fa20a71abe5b59e31102b118d;hpb=d9d73d80c1b738b3b30eb40d192f61cbdb0e201f;p=riscv-isa-sim.git

diff --git a/riscv/sim.h b/riscv/sim.h
index 9e1362e..ca1ad6f 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -15,7 +15,8 @@ class htif_isasim_t;
 class sim_t
 {
 public:
-  sim_t(size_t _nprocs, size_t mem_mb, const std::vector<std::string>& htif_args);
+  sim_t(const char* isa, size_t _nprocs, size_t mem_mb,
+        const std::vector<std::string>& htif_args);
   ~sim_t();
 
   // run the simulation to completion
@@ -72,6 +73,7 @@ private:
   reg_t get_tohost(const std::vector<std::string>& args);
 
   friend class htif_isasim_t;
+  friend class processor_t;
 };
 
 extern volatile bool ctrlc_pressed;