X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fsim.h;h=d8f39e2e73ed9e7637bf55834dc303d00a2cf1ae;hb=9220fdfe955379af4c6cff00e7925a650b2180a5;hp=89d3648ee4aa91651d5628d960ccd56ecfa66291;hpb=a9c5b05eca6a46a0c8722b26b741fc7f1de22405;p=riscv-isa-sim.git

diff --git a/riscv/sim.h b/riscv/sim.h
index 89d3648..d8f39e2 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -29,6 +29,7 @@ public:
   void set_histogram(bool value);
   void set_procs_debug(bool value);
   htif_isasim_t* get_htif() { return htif.get(); }
+  const char* get_config_string() { return &config_string->contents()[0]; }
 
   // returns the number of processors in this simulator
   size_t num_cores() { return procs.size(); }