X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=shakti%2Fm_class%2Flibre_riscv_chennai_2018.tex;h=dca9e9b8fb5b855d948d915f87b3044eaceb14d7;hb=3f444fffc5a6b49cb5879ee44bd351b0a80a7dd8;hp=16573fde8192430bdb5c8fb6b3072ea00d79e475;hpb=4e9a404e59cd4a7aa5e14ffc0174e8e2282c75f8;p=libreriscv.git

diff --git a/shakti/m_class/libre_riscv_chennai_2018.tex b/shakti/m_class/libre_riscv_chennai_2018.tex
index 16573fde8..dca9e9b8f 100644
--- a/shakti/m_class/libre_riscv_chennai_2018.tex
+++ b/shakti/m_class/libre_riscv_chennai_2018.tex
@@ -79,7 +79,7 @@
 }
 
 
-\frame{\frametitle{Does what we want already exist?}
+\frame{\frametitle{Does what we want already exist? Surely this is nonsense!}
  \begin{center}
   \includegraphics[height=2.4in]{nolibresocs.jpg}\\
   {\bf Analysis of SoCs over the past 7+ years (answer: no)}
@@ -87,7 +87,7 @@
 }
 
 
-\frame{\frametitle{What's the problem?}
+\frame{\frametitle{Breakdown of non-existence of fully-Libre SoCs}
 
  \begin{itemize}
    \item {\bf iMX6}: Libre bootable, Vivante 3D GPU (libre etnaviv)
@@ -140,7 +140,10 @@
 	     and helping others fulfil their needs and goals)
   \end{itemize}
   {\it Detachment from the goal also helps. If someone else makes this
-   product then GREAT! I can go do something else}
+   product then GREAT! I can go do something else}\\
+   \vspace{4pt}
+  {\bf Main point: please do not automatically assume Ethical and Libre is
+   non-commercial. It's not nice, and it's not helping }
 
 }
 
@@ -212,6 +215,69 @@
 }
 
 
+\frame{\frametitle{Challenging Stuff [1] - Memory Interfaces}
+
+ \begin{itemize}
+   \item DDR3/4 PHYs are analog and very high speed.
+		   Impedance training.  Extreme timing tolerances on parallel buses.\\
+		   No surprise they cost USD \$1m and above.
+   \item Symbiotic EDA will do (Libre) PHY layout for USD \$300k,
+	     time to completion for chosen geometry: 8-12 months.
+  \end{itemize}
+   {\it Silicon-proven but still risky.  What are the alternatives?}
+   \vspace{4pt}
+ \begin{itemize}
+   \item 133mhz 32-bit SDRAM (um...) maybe even FlexBus?
+   \item HyperRAM (aka JEDEC xSPI) 8-bit SPI 166mhz or DDR-300.\\
+	   300mbyte/sec for only 13 wires, not bad!  (We'll take several)\\
+	   http://libre-riscv.org/shakti/m\_class/HyperRAM/
+   \item HMC: insanely fast, very low power.  OpenHMC (LGPL)
+	   https://opencores.org/project/openhmc
+  \end{itemize}
+}
+
+
+\frame{\frametitle{Challenging Stuff [2] - Video Decode Engine}
+
+ \begin{itemize}
+   \item Richard Herveille's Video Core Blocks\\
+    	    https://opencores.org/project/video\_systems
+   \item Symbiotic EDA MP4 decoder in FPGA
+   \item H.264 seems to have been done...\\
+         https://github.com/adsc-hls/synthesizable\_h264
+   \item Really needs SIMD (or better, not-SIMD)\\
+         {http://libre-riscv.org/simple\_v\_extension/}
+   \item Definitely needs xBitManip (parallelised by Simple-V)\\
+         https://github.com/cliffordwolf/xbitmanip
+  \end{itemize}
+   {\it SIMD is insane. $O(N^6)$ opcode proliferation.  See\\
+     https://www.sigarch.org/simd-instructions-considered-harmful/ \\
+     (1): P-Ext designed for Audio. (2): Investigate RI5CY's SIMD
+   }
+}
+
+
+\frame{\frametitle{Challenging Stuff [3] - Libre 3D GPU.  Sigh.}
+
+ \begin{itemize}
+   \item Actual requirements quite modest: 30MP/s 100MT/s 5GFLOPS
+         but power/area is crucial ($2mm^2$ @ 40nm)
+   \item Nyuzi, MIAOW, GPLGPU (Number Nine), OGP.
+   \item Nyuzi based on Larrabee. Jeff Bush really helpful.
+   \item MIAOW is an OpenCL engine.  GPLGPU is fixed-function
+   \item Nyuzi lessons: Software-only rendering not enough.
+	     Getting through L1 cache takes most power. Fixed functions
+	     such as parallel FP-Quad to ARGB Pixel, and Z-Buffer
+	     needed.
+   \item Fallback is GC800 (\$250k) {\it contact me if you can do better!}
+  \end{itemize}
+   {\it Jacob Bachmeyer's Cache-control proposal turns L1 Cache into
+   scratchpad RAM.  RVV is just too heavy (sorry!), Simple-V much
+   more light-weight and flexible ($O(1)$ ISA proliferation)
+   }
+}
+
+
 \frame{\frametitle{TODO}
 
  \begin{itemize}
@@ -223,7 +289,20 @@
 \frame{\frametitle{Summary}
 
  \begin{itemize}
-   \item TODO
+   \item Making a commercially-desirable SoC is neither academically
+         nor standard-investor sexy!  No AI. Boring. zzzz
+   \item Luckily there is an anonymous sponsor who needs an SoC that
+	     doesn't exist (who knows the commercial benefits of Libre)
+   \item Shakti Group know the benefits (cost, sovereignty) of a Libre
+         Mobile-Class SoC as well (No spying on India citizens!)
+   \item A Libre GPU, even a modest performer (100T/s etc.) 
+	     is the biggest technical risk/unknown (besides DDR3/4).\\
+	     (fall-back is GC800. Do please help with a Libre GPU!)
+    \item DDR3/4 and eMMC are the main high-risk interfaces\\
+	     (there are fall-back strategies in place)
+	\item Ultimately the strategy is all about cost reduction
+	      vs risk mitigation,
+	      with Libre/Ethical prioritised over "convenience"
   \end{itemize}
 }