X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fbsv%2Fperipheral_gen%2Fbase.py;h=6127a4e855494e0d9745b8258f19a9aeafc09f5f;hb=f62782085348246df62f2ff79d50a8be10cc7a20;hp=e07ba18f299e13df887d18880133fa47d88396f7;hpb=c370b2abc0b69f3f00220c579846f73cba9a4be9;p=pinmux.git diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py index e07ba18..6127a4e 100644 --- a/src/bsv/peripheral_gen/base.py +++ b/src/bsv/peripheral_gen/base.py @@ -149,7 +149,7 @@ class PBase(MMapConfig): if cfgstart: start = cfgstart end = start + offs - 1 - offs = 0 # don't do contiguous addressing + offs = 0 # don't do contiguous addressing else: end = start + offs - 1 bname = self.axibase(name, ifacenum, idx) @@ -347,9 +347,8 @@ else""" else: spc = ck ck = self.get_clk_spc(ctype) - template = """\ -Ifc_sync#({0}) {1}_sync <-mksyncconnection( - {2}, {3});""" + template = "Ifc_sync#({0}) {1}_sync <-mksyncconnection(\n" + \ + " {2}, {3});" for p in self.peripheral.pinspecs: typ = p['type'] pname = p['name'] @@ -390,9 +389,8 @@ Ifc_sync#({0}) {1}_sync <-mksyncconnection( else: spc = ck ck = self.get_clk_spc(ctype) - template = """\ -Ifc_sync#({0}) {1}_sync <-mksyncconnection( - {2}, {3});""" + template = "Ifc_sync#({0}) {1}_sync <-mksyncconnection(\n" + \ + " {2}, {3});""" n_ = "{0}{1}".format(name, count) n_ = '{0}_{1}'.format(n_, pname) @@ -669,8 +667,6 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): - iname = self.data[name].iname().format(i) - print "extfast", iname, self.is_on_fastbus(name, i) if self.is_on_fastbus(name, i): continue ret.append(self.data[name].extfastifinstance(name, i)) @@ -680,7 +676,6 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): - iname = self.data[name].iname().format(i) ret.append(self.data[name].extifinstance2(name, i)) return '\n'.join(li(list(filter(None, ret)), 8)) @@ -688,7 +683,6 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): - iname = self.data[name].iname().format(i) if not self.is_on_fastbus(name, i): continue ret.append(self.data[name].extifinstance(name, i)) @@ -985,6 +979,7 @@ class PFactory(object): from uart import uart from quart import quart from sdmmc import sdmmc + from emmc import emmc from pwm import pwm from eint import eint from rs232 import rs232 @@ -1010,6 +1005,7 @@ class PFactory(object): 'pwm': pwm, 'eint': eint, 'mmc': sdmmc, + 'emmc': emmc, 'jtag': jtag, 'lcd': rgbttl, 'fb': flexbus,