X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fbsv%2Fperipheral_gen%2Fsdram.py;h=308da1b25c8de40a3676976b4415da725be67c0f;hb=45903051fb3ef1adb200e4f866ba3b5069d8127e;hp=58e7c027f2ab3157092f6afcf8c4b45113f2353f;hpb=5341c63c67a38fdad72c717ac8584ff31f024b16;p=pinmux.git

diff --git a/src/bsv/peripheral_gen/sdram.py b/src/bsv/peripheral_gen/sdram.py
index 58e7c02..308da1b 100644
--- a/src/bsv/peripheral_gen/sdram.py
+++ b/src/bsv/peripheral_gen/sdram.py
@@ -19,10 +19,10 @@ class sdram(PBase):
                 "Ifc_sdram_out sdr{0}_out;".format(count)
 
     def get_clk_spc(self, typ):
-        return "clk0, slow_reset"
+        return "core_clock, core_reset"
 
     def get_clock_reset(self, name, count):
-        return "slow_clock, slow_reset"
+        return "clk0, core_reset"
 
     def mkfast_peripheral(self):
         return "Ifc_sdr_slave sdr{0} <- mksdr_axi4_slave(clk0);"
@@ -35,6 +35,7 @@ class sdram(PBase):
         return {'sdrwen': 'ifc_sdram_out.osdr_we_n',
                 'sdrcsn0': 'ifc_sdram_out.osdr_cs_n',
                 'sdrcke': 'ifc_sdram_out.osdr_cke',
+                'sdrclk': 'ifc_sdram_out.osdr_clock',
                 'sdrrasn': 'ifc_sdram_out.osdr_ras_n',
                 'sdrcasn': 'ifc_sdram_out.osdr_cas_n',
                 }.get(pname, '')