X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Flib%2FMemoryMap.bsv;h=a46ef3ac738448ea007a46be1503c916fb8d1364;hb=c13d0c375a0930795f722edaaea7495b679da1b0;hp=432ad4838114373e10137e394f76a304bfc47f0c;hpb=0efd5469ef8de1c045a4d022c90c60db77513b46;p=shakti-core.git diff --git a/src/lib/MemoryMap.bsv b/src/lib/MemoryMap.bsv index 432ad48..a46ef3a 100644 --- a/src/lib/MemoryMap.bsv +++ b/src/lib/MemoryMap.bsv @@ -31,21 +31,21 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. package MemoryMap; /*=== Project imports ==== */ import defined_types::*; - import socgen::*; - import slow_peripherals::*; + import fast_memory_map::*; + import slow_memory_map::*; `include "instance_defines.bsv" `include "core_parameters.bsv" /*========================= */ -function Tuple2 #(Bool, Bit#(TLog#(Num_Slaves))) +function Tuple2 #(Bool, Bit#(TLog#(Num_Fast_Slaves))) fn_addr_to_slave_num (Bit#(`PADDR) addr); - let ft = FastTuple2(addr); + let ft = fn_addr_to_fastslave_num(addr); Bool isfast = tpl_1(ft); - Bit#(TLog#(Num_Slaves)) x = tpl_2(ft); + Bit#(TLog#(Num_Fast_Slaves)) x = tpl_2(ft); - let st = SlowTuple2(addr); + let st = fn_slow_address_mapping(addr); Bool isslow = tpl_1(st); Bit#(TLog#(Num_Slow_Slaves)) y = tpl_2(st); if (isfast) @@ -60,11 +60,16 @@ endfunction function Bool is_IO_Addr(Bit#(`PADDR) addr); // TODO Shuold be PADDR if(addr>=`DebugBase && addr<=`DebugEnd) return (True); - else if(addr>=`SDRAMMemBase && addr<=`SDRAMMemEnd) - `ifdef FlexBus - return (True); - `else - return (False); + else + `ifdef SDR0_0_Base + if(addr>=`SDR0_0_Base && addr<=`SDR0_0_End) + `ifdef FlexBus + return (True); + `else + return (False); + `endif + `else + return (False); `endif `ifdef BOOTROM else if(addr>=`BootRomBase && addr<=`BootRomEnd)