X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmain%2Fscala%2Fdevices%2Fspi%2FSPIPeriphery.scala;h=daa0a9f9ed5cc3c02e5af41a0dde991d6aa09d58;hb=79f64de12cac914c0c195dc876f34adcaf15f7d5;hp=2459b75324854f97a3266db410820fc432f2bcc3;hpb=29226701a8ca7a5754b3d52cd9e99cf588782a75;p=sifive-blocks.git

diff --git a/src/main/scala/devices/spi/SPIPeriphery.scala b/src/main/scala/devices/spi/SPIPeriphery.scala
index 2459b75..daa0a9f 100644
--- a/src/main/scala/devices/spi/SPIPeriphery.scala
+++ b/src/main/scala/devices/spi/SPIPeriphery.scala
@@ -52,7 +52,7 @@ trait HasPeripherySPIFlash extends HasTopLevelNetworks {
 
 trait HasPeripherySPIFlashBundle extends HasTopLevelNetworksBundle {
   val outer: HasPeripherySPIFlash 
-  val qspi = HeterogenousBag(outer.spiFlashParams.map(new SPIPortIO(_)))
+  val qspi = HeterogeneousBag(outer.spiFlashParams.map(new SPIPortIO(_)))
 }
 
 trait HasPeripherySPIFlashModule extends HasTopLevelNetworksModule {
@@ -60,7 +60,7 @@ trait HasPeripherySPIFlashModule extends HasTopLevelNetworksModule {
   val io: HasPeripherySPIFlashBundle
 
   (io.qspi zip outer.qspi) foreach { case (io, device) => 
-    io.qspi <> device.module.io.port
+    io <> device.module.io.port
   }
 }