X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmain%2Fscala%2Futil%2FTimer.scala;h=35e4a8341b8b3cc314a55870f3ad12d5118eca1e;hb=39287b92159e7f7a25635dfe7cc5cb7dc01488bc;hp=e0cba874f171b5acbfc464e1edea3a8d123035ae;hpb=7916ef5249c72a3a84c599d123760f4d716de58a;p=sifive-blocks.git

diff --git a/src/main/scala/util/Timer.scala b/src/main/scala/util/Timer.scala
index e0cba87..35e4a83 100644
--- a/src/main/scala/util/Timer.scala
+++ b/src/main/scala/util/Timer.scala
@@ -3,15 +3,13 @@ package sifive.blocks.util
 
 import Chisel._
 import Chisel.ImplicitConversions._
-import regmapper._
-import util.WideCounter
+import freechips.rocketchip.regmapper._
+import freechips.rocketchip.util.WideCounter
 
-class SlaveRegIF(w: Int) extends Bundle {
+class SlaveRegIF(private val w: Int) extends Bundle {
   val write = Valid(UInt(width = w)).flip
   val read = UInt(OUTPUT, w)
 
-  override def cloneType: this.type = new SlaveRegIF(w).asInstanceOf[this.type]
-
   def toRegField(dummy: Int = 0): RegField = {
     def writeFn(valid: Bool, data: UInt): Bool = {
       write.valid := valid
@@ -38,6 +36,7 @@ abstract class GenericTimer extends Module {
   protected def sticky: Bool = Bool(false)
   protected def oneShot: Bool = Bool(false)
   protected def center: UInt = UInt(0)
+  protected def extra: UInt = UInt(0)
   protected def gang: UInt = UInt(0)
   protected val scaleWidth = 4
   protected val regWidth = 32
@@ -76,8 +75,9 @@ abstract class GenericTimer extends Module {
   protected val countReset = feed || (zerocmp && elapsed(0))
   when (countReset) { count := 0 }
 
-  io.regs.cfg.read := Cat(ip, gang | UInt(0, maxcmp), UInt(0, maxcmp), center | UInt(0, maxcmp),
-                          UInt(0, 2), countAwake || oneShot, countAlways, UInt(0, 1), deglitch, zerocmp, rsten || sticky, UInt(0, 8-scaleWidth), scale)
+  io.regs.cfg.read := Cat(ip, gang | UInt(0, maxcmp), extra | UInt(0, maxcmp), center | UInt(0, maxcmp),
+    UInt(0, 2), countAwake || oneShot, countAlways, UInt(0, 1), deglitch, zerocmp, rsten || sticky,
+    UInt(0, 8-scaleWidth),  scale)
   io.regs.countLo.read := count
   io.regs.countHi.read := count >> regWidth
   io.regs.s.read := s