X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fperipherals%2Fflexbus%2FFlexBus_Types.bsv;h=19ba1a49057d3c46b101d9c792a466b0f5e57971;hb=9630336b1b983ed25e7c451cf008d45fae389b6d;hp=a21ccf5e6aef5c49179284700dabb07776cacbf4;hpb=a25c6287911439a284f0d7afcb875fa0e82e9439;p=shakti-peripherals.git

diff --git a/src/peripherals/flexbus/FlexBus_Types.bsv b/src/peripherals/flexbus/FlexBus_Types.bsv
index a21ccf5..19ba1a4 100644
--- a/src/peripherals/flexbus/FlexBus_Types.bsv
+++ b/src/peripherals/flexbus/FlexBus_Types.bsv
@@ -67,19 +67,31 @@ interface FlexBus_Master_IFC;
    // FlexBus External Signals
   
    // AD inout bus separate for now in BSV
-   interface Get#(Bit#(32))  m_AD;         // out
-   interface Put#(Bit#(32)) m_din;         // in
-
-   interface Get#(Bit#(1))   m_R_Wn;       // out
-   interface Get#(Bit#(2))   m_TSIZ;       // out
-
-   interface Get#(Bit#(6))   m_FBCSn;      // out
-   interface Get#(Bit#(4))   m_BE_BWEn;    // out
-   interface Get#(Bit#(1))   m_TBSTn;      // out
-   interface Get#(Bit#(1))   m_OEn;        // out
-
-   interface Get#(Bit#(1))   m_ALE;        // out
-   interface Put#(Bit#(1))   tAn;          // in
+   (* always_ready *)
+   interface Get#(Bit#(32)) m_AD;      // out
+   (* always_ready *)
+   interface Put#(Bit#(32)) m_din;     // in
+   (* always_ready *)
+   interface Get#(Bit#(32)) m_OE32n;   // out 32-bits, same as OEn
+
+   (* always_ready *)
+   interface Get#(Bit#(1))  m_R_Wn;    // out
+   (* always_ready *)
+   interface Get#(Bit#(2))  m_TSIZ;    // out
+
+   (* always_ready *)
+   interface Get#(Bit#(6))  m_FBCSn;   // out
+   (* always_ready *)
+   interface Get#(Bit#(4))  m_BWEn; // out
+   (* always_ready *)
+   interface Get#(Bit#(1))  m_TBSTn;   // out
+   (* always_ready *)
+   interface Get#(Bit#(1))  m_OEn;     // out
+
+   (* always_ready *)
+   interface Get#(Bit#(1))  m_ALE;     // out
+   (* always_ready *)
+   interface Put#(Bit#(1))  m_tAn;     // in
 
 endinterface: FlexBus_Master_IFC
 
@@ -1073,7 +1085,7 @@ module mkAXI4_Slave_to_FlexBus_Master_Xactor
 interface flexbus_side = interface FlexBus_Master_IFC;
 	    //interface io_AD_master = tri_AD_out.io;
         
-    interface tAn = interface Put
+    interface m_tAn = interface Put
         method Action put(Bit#(1) in) if(c_TAn[0] matches tagged Invalid);
             c_TAn[0] <= tagged Valid in;
         endmethod
@@ -1109,7 +1121,7 @@ interface flexbus_side = interface FlexBus_Master_IFC;
         endmethod
     endinterface;
 
-    interface m_BE_BWEn = interface Get
+    interface m_BWEn = interface Get
         method ActionValue#(Bit#(4)) get;
             return r_BE_BWEn;
         endmethod
@@ -1121,6 +1133,16 @@ interface flexbus_side = interface FlexBus_Master_IFC;
         endmethod
     endinterface;
 
+    interface m_OE32n = interface Get
+        method ActionValue#(Bit#(32)) get;
+            Bit#(32) ten;
+            for (int i=0; i<32; i=i+1) begin
+              ten[i] = r_OEn;
+            end
+            return ten;
+        endmethod
+    endinterface;
+
     interface m_OEn = interface Get
         method ActionValue#(Bit#(1)) get;
             return r_OEn;