X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fspec%2Fi_class.py;h=780decd39376b8318ecb808f4e6efe37644c7448;hb=533aeace8a6542358837d7945df95266ad12720a;hp=5d73b26fdba028766c0d8e6424614e19c26ed98f;hpb=08e251cb85f45f882d1c5a807183dff9946e9968;p=pinmux.git

diff --git a/src/spec/i_class.py b/src/spec/i_class.py
index 5d73b26..780decd 100644
--- a/src/spec/i_class.py
+++ b/src/spec/i_class.py
@@ -8,7 +8,10 @@ from spec.ifaceprint import display_fixed
 
 def pinspec():
     pinbanks = {
-        'A': 28,
+        'A': (28, 4),
+        'B': (18, 4),
+        'C': (24, 1),
+        'D': (92, 1),
     }
     fixedpins = {
         'CTRL_SYS': [
@@ -58,7 +61,7 @@ def pinspec():
                       }
 
     ps = PinSpec(pinbanks, fixedpins, function_names,
-                 ['lcd', 'jtag'])
+                 ['lcd', 'jtag', 'fb', 'sdr'])
 
     # Bank A, 0-27
     ps.gpio("", ('A', 0), 0, 0, 28)
@@ -82,6 +85,25 @@ def pinspec():
     ps.uart("1", ('A', 2), 2)
     ps.uart("2", ('A', 14), 2)
 
+    # see comment in spec.interfaces.PinGen, this is complicated.
+    flexspec = {
+        #'FB_TS': ('FB_ALE', 2), # commented out for now
+        'FB_CS2': ('FB_BWE2', 2),
+        'FB_AD0': ('FB_BWE2', 3),
+        'FB_CS3': ('FB_BWE3', 2),
+        'FB_AD1': ('FB_BWE3', 3),
+        'FB_TBST': ('FB_OE', 2),
+        'FB_TSIZ0': ('FB_BWE0', 2),
+        'FB_TSIZ1': ('FB_BWE1', 2),
+    }
+    ps.gpio("", ('B', 0), 0, 0, 18)
+    ps.flexbus1("", ('B', 0), 1, spec=flexspec)
+
+    ps.flexbus2("", ('C', 0), 0)
+
+    ps.sdram1("", ('D', 0), 0)
+    ps.sdram3("", ('D', 35), 0)
+
     # Scenarios below can be spec'd out as either "find first interface"
     # by name/number e.g. SPI1, or as "find in bank/mux" which must be
     # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
@@ -90,7 +112,7 @@ def pinspec():
     # lists (interfaces, EINTs, PWMs) from available pins.
 
     i_class = ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0',
-                'TWI0', 'MSPI0', 'B3:SD1', ]
+               'TWI0', 'MSPI0', 'B3:SD1', ]
     i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4']
     i_class_pwm = ['B2:PWM_0']
     descriptions = {