X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fspec%2Fm_class.py;h=e9c3a646b5d5572e517d3270a906652fc0a580fe;hb=ced272e94680ee5a055b0e67107a6284d16f1333;hp=cacab5ee064cf2ca179a294561c132d7354bb8ba;hpb=2771d517f727f56dd2c03982da4a940415d4e428;p=pinmux.git diff --git a/src/spec/m_class.py b/src/spec/m_class.py index cacab5e..e9c3a64 100644 --- a/src/spec/m_class.py +++ b/src/spec/m_class.py @@ -3,14 +3,14 @@ from spec.base import PinSpec -def pinspec(of): - pinbanks = {'A': 16, - 'B': 28, - 'C': 24, - 'D': 24, - 'E': 24, - 'F': 10, - 'G': 32, +def pinspec(): + pinbanks = {'A': (16, 4), + 'B': (28, 4), + 'C': (24, 4), + 'D': (24, 4), + 'E': (24, 4), + 'F': (10, 4), + 'G': (32, 4), } fixedpins = { 'DDR3': [ @@ -82,19 +82,19 @@ def pinspec(of): 'JTAG1': 'JTAG (same as JTAG0, JTAG_SEL=HIGH)', 'LCD': '24-pin RGB/TTL LCD', 'RG': 'RGMII Ethernet', - 'MMC': 'eMMC 1/2/4/8 pin', + 'EMMC': 'eMMC 1/2/4/8 pin', 'PWM': 'PWM (pulse-width modulation)', - 'SD0': 'SD/MMC 0', - 'SD1': 'SD/MMC 1', - 'SD2': 'SD/MMC 2', + 'MMC0': 'SD/MMC 0', + 'MMC1': 'SD/MMC 1', + 'MMC2': 'SD/MMC 2', 'SPI0': 'SPI (Serial Peripheral Interface) 0', 'SPI1': 'SPI (Serial Peripheral Interface) 1', 'QSPI': 'Quad SPI (Serial Peripheral Interface) 1', 'TWI0': 'I2C 1', 'TWI1': 'I2C 2', 'TWI2': 'I2C 3', - 'UARTQ0': 'UART (TX/RX/CTS/RTS) 0', - 'UARTQ1': 'UART (TX/RX/CTS/RTS) 1', + 'QUART0': 'UART (TX/RX/CTS/RTS) 0', + 'QUART1': 'UART (TX/RX/CTS/RTS) 1', 'UART0': 'UART (TX/RX) 0', 'UART1': 'UART (TX/RX) 1', 'UART2': 'UART (TX/RX) 2', @@ -106,139 +106,130 @@ def pinspec(of): ps = PinSpec(pinbanks, fixedpins, function_names) # Bank A, 0-15 - ps.gpio("", ('A', 0), "A", 0, 0, 16) - ps.spi("0", ('A', 0), "A", 3) - ps.uartfull("1", ('A', 0), "A", 2) - ps.i2c("0", ('A', 4), "A", 2) - ps.emmc("", ('A', 0), "A", 1) - #ps.uart("0", ('A', 14), "A", 1) - ps.spi("1", ('A', 6), "A", 2) - ps.eint("", ('A', 10), "A", 1, start=0, limit=6) - ps.eint("", ('A', 4), "A", 3, start=0, limit=6) - ps.sdmmc("0", ('A', 10), "A", 2) - ps.jtag("0", ('A', 10), "A", 3) - ps.uart("0", ('A', 14), "A", 3) + ps.gpio("", ('A', 0), 0, 0, 16) + ps.spi("0", ('A', 0), 3) + ps.uartfull("1", ('A', 0), 2) + ps.i2c("0", ('A', 4), 2) + ps.emmc("", ('A', 0), 1) + #ps.uart("0", ('A', 14), 1) + ps.spi("1", ('A', 6), 2) + ps.eint("", ('A', 10), 1, start=0, limit=6) + ps.eint("", ('A', 4), 3, start=0, limit=6) + ps.sdmmc("0", ('A', 10), 2) + ps.jtag("0", ('A', 10), 3) + ps.uart("0", ('A', 14), 3) # Bank B, 16-47 - ps.gpio("", ('B', 0), "B", 0, 0, 28) - ps.rgbttl("0", ('B', 0), "B", 1) - ps.spi("0", ('B', 12), "B", 2) - ps.quadspi("", ('B', 4), "B", 2, limit=4) - ps.uart("1", ('B', 16), "B", 2) - ps.i2c("2", ('B', 18), "B", 2) - ps.pwm("", ('B', 9), "B", 2, start=0, limit=1) - ps.pwm("", ('B', 20), "B", 2, start=1, limit=2) - ps.sdmmc("0", ('B', 22), "B", 2) - ps.eint("", ('B', 0), "B", 3, start=6, limit=4) - ps.flexbus2("", ('B', 4), "B", 3) - ps.i2c("0", ('B', 0), "B", 2) - ps.uart("0", ('B', 2), "B", 2) - ps.uart("2", ('B', 10), "B", 2) + ps.gpio("", ('B', 0), 0, 0, 28) + ps.rgbttl("0", ('B', 0), 1) + ps.spi("0", ('B', 12), 2) + ps.quadspi("", ('B', 4), 2, limit=4) + ps.uart("1", ('B', 16), 2) + ps.i2c("2", ('B', 18), 2) + ps.pwm("", ('B', 9), 2, start=0, limit=1) + ps.pwm("", ('B', 20), 2, start=1, limit=2) + ps.sdmmc("0", ('B', 22), 2) + ps.eint("", ('B', 0), 3, start=6, limit=4) + ps.flexbus2("", ('B', 4), 3) + ps.i2c("0", ('B', 0), 2) + ps.uart("0", ('B', 2), 2) + ps.uart("2", ('B', 10), 2) # Bank C, 48-71 - ps.gpio("", ("C", 0), "C", 0, 0, 24) - ps.ulpi("0", ('C', 0), "C", 1) - ps.ulpi("1", ('C', 12), "C", 1) - ps.spi("1", ('C', 8), "C", 2) - #ps.spi("1", ('C', 28), "C", 2) - ps.uartfull("0", ('C', 20), "C", 3) - ps.eint("", ('C', 0), "C", 3, start=10, limit=8) - ps.jtag("1", ('C', 8), "C", 3) - ps.eint("", ('C', 12), "C", 3, start=22, limit=8) - ps.uart("0", ('C', 22), "C", 2) - ps.i2s("", ('C', 13), "C", 2) - ps.pwm("", ('C', 21), "C", 2, start=2, limit=1) + ps.gpio("", ("C", 0), 0, 0, 24) + ps.ulpi("0", ('C', 0), 1) + ps.ulpi("1", ('C', 12), 1) + ps.spi("1", ('C', 8), 2) + #ps.spi("1", ('C', 28), 2) + ps.uartfull("0", ('C', 20), 3) + ps.eint("", ('C', 0), 3, start=10, limit=8) + ps.jtag("1", ('C', 8), 3) + ps.eint("", ('C', 12), 3, start=22, limit=8) + ps.uart("0", ('C', 22), 2) + ps.i2s("", ('C', 13), 2) + ps.pwm("", ('C', 21), 2, start=2, limit=1) # Bank D, 72-96 - # ok this is slightly complicated, basically there's extra - # functions that we want to be on the same pin (but a different mux) - # because their use is mutually-exclusive. you can't have FB_TS - # at the same time as FB_ALE for example. FB_BWE2 even has two - # mutually exclusive functions. these extra functions are - # specified here, so that when e.g. FB_BWE2 has been positioned, - # FB_A0 will be placed in bank d, mux column 3, *on the same pin*. - # this saves messing about, because if FB_BWE2 moved to a - # different pin so would FB_A0 (and FB_CS2) likewise have to be - # moved. and the rest. + # see comment in spec.interfaces.PinGen, this is complicated. flexspec = { - 'FB_TS': ('FB_ALE', 2, "D"), - 'FB_CS2': ('FB_BWE2', 2, "D"), - 'FB_A0': ('FB_BWE2', 3, "D"), - 'FB_CS3': ('FB_BWE3', 2, "D"), - 'FB_A1': ('FB_BWE3', 3, "D"), - 'FB_TBST': ('FB_OE', 2, "D"), - 'FB_TSIZ0': ('FB_BWE0', 2, "D"), - 'FB_TSIZ1': ('FB_BWE1', 2, "D"), + 'FB_TS': ('FB_ALE', 2), + 'FB_CS2': ('FB_BWE2', 2), + 'FB_A0': ('FB_BWE2', 3), + 'FB_CS3': ('FB_BWE3', 2), + 'FB_A1': ('FB_BWE3', 3), + 'FB_TBST': ('FB_OE', 2), + 'FB_TSIZ0': ('FB_BWE0', 2), + 'FB_TSIZ1': ('FB_BWE1', 2), } - #ps.mcu8080("", 72, "D", 1) - ps.gpio("", ('D', 0), "D", 0, 0, 24) - ps.flexbus1("", ('D', 0), "D", 1, spec=flexspec) - ps.i2c("1", ('D', 8), "D", 3) - ps.pwm("", ('D', 21), "D", 1, start=0, limit=3) - ps.i2c("0", ('D', 10), "D", 3) - ps.i2c("2", ('D', 19), "D", 2) - ps.uartfull("0", ('D', 0), "D", 2) - ps.uart("1", ('D', 21), "D", 2) - ps.uart("2", ('D', 13), "D", 2) - ps.eint("", ('D', 19), "D", 3, start=18, limit=4) - ps.eint("", ('D', 23), "D", 3, start=9, limit=1) - ps.eint("", ('D', 13), "D", 3, start=5, limit=4) - ps.eint("", ('D', 0), "D", 3, start=30, limit=2) - ps.i2c("1", ('D', 2), "D", 3) - ps.sdmmc("1", ('D', 4), "D", 2) + #ps.mcu8080("", 72, 1) + ps.gpio("", ('D', 0), 0, 0, 24) + ps.flexbus1("", ('D', 0), 1, spec=flexspec) + ps.i2c("1", ('D', 8), 3) + ps.pwm("", ('D', 21), 1, start=0, limit=3) + ps.i2c("0", ('D', 10), 3) + ps.i2c("2", ('D', 19), 2) + ps.uartfull("0", ('D', 0), 2) + ps.uart("1", ('D', 21), 2) + #ps.uart("2", ('D', 13), 2) + ps.eint("", ('D', 19), 3, start=18, limit=4) + ps.eint("", ('D', 23), 3, start=9, limit=1) + ps.eint("", ('D', 13), 3, start=5, limit=4) + ps.eint("", ('D', 0), 3, start=30, limit=2) + ps.i2c("1", ('D', 2), 3) + ps.sdmmc("1", ('D', 4), 2) # Bank E - ps.gpio("", ('E', 0), "E", 0, 0, 24) - ps.flexbus2("", ('E', 0), "E", 1) - ps.sdmmc("1", ('E', 0), "E", 2) - ps.sdmmc("2", ('E', 8), "E", 2) - ps.quadspi("", ('E', 18), "E", 2) - ps.uartfull("1", ('E', 14), "E", 2) - ps.i2c("1", ('E', 6), "E", 2) - ps.eint("", ('E', 0), "E", 3, start=10, limit=8) - ps.eint("", ('E', 8), "E", 3, start=22, limit=6) - ps.emmc("", ('E', 14), "E", 3) + ps.gpio("", ('E', 0), 0, 0, 24) + ps.flexbus2("", ('E', 0), 1) + ps.sdmmc("1", ('E', 0), 2) + ps.sdmmc("2", ('E', 8), 2) + ps.quadspi("", ('E', 18), 2) + ps.uartfull("1", ('E', 14), 2) + ps.i2c("1", ('E', 6), 2) + ps.eint("", ('E', 0), 3, start=10, limit=8) + ps.eint("", ('E', 8), 3, start=22, limit=6) + ps.emmc("", ('E', 14), 3) # Bank F - ps.gpio("", ('F', 0), "F", 0, 0, 10) - ps.i2s("", ('F', 0), "F", 1) - ps.i2c("0", ('F', 6), "F", 2) - ps.pwm("", ('F', 8), "F", 2, start=0, limit=1) - ps.pwm("", ('F', 9), "F", 2, start=1, limit=1) - ps.uart("2", ('F', 8), "F", 1) - ps.sdmmc("2", ('F', 0), "F", 2) - ps.eint("", ('F', 0), "F", 3, start=18, limit=4) - ps.pwm("", ('F', 4), "F", 3, start=2, limit=1) - ps.eint("", ('F', 5), "F", 3, start=7, limit=1) - ps.eint("", ('F', 6), "F", 3, start=28, limit=4) + ps.gpio("", ('F', 0), 0, 0, 10) + ps.i2s("", ('F', 0), 1) + ps.i2c("0", ('F', 6), 2) + ps.pwm("", ('F', 8), 2, start=0, limit=1) + ps.pwm("", ('F', 9), 2, start=1, limit=1) + ps.uart("2", ('F', 8), 1) + ps.sdmmc("2", ('F', 0), 2) + ps.eint("", ('F', 0), 3, start=18, limit=4) + ps.pwm("", ('F', 4), 3, start=2, limit=1) + ps.eint("", ('F', 5), 3, start=7, limit=1) + ps.eint("", ('F', 6), 3, start=28, limit=4) # Bank G - ps.gpio("", ('G', 0), "G", 0, 0, 32) - ps.rgmii("", ('G', 0), "G", 1) - ps.ulpi("2", ('G', 20), "G", 1) - ps.rgbttl("1", ('G', 0), "G", 2) - ps.quadspi("", ('G', 26), "G", 3) - ps.flexbus2("", ('G', 0), "G", 3) - ps.sdmmc("1", ('G', 24), "G", 3, limit=2) - ps.sdmmc("1", ('G', 28), "G", 2, start=2) + ps.gpio("", ('G', 0), 0, 0, 32) + ps.rgmii("", ('G', 0), 1) + ps.ulpi("2", ('G', 20), 1) + ps.rgbttl("1", ('G', 0), 2) + ps.quadspi("", ('G', 26), 3) + ps.flexbus2("", ('G', 0), 3) + ps.sdmmc("1", ('G', 24), 3, limit=2) + ps.sdmmc("1", ('G', 28), 2, start=2) # EOMA68 scenario. not totally complete (some GPIO needed for PMIC) # One interface to be connected to the MCU to give RTC and boot/dbg # VBUS_EN, OTG_ID etc. are all not included below, there is plenty # of spare GPIO. - eoma68 = ['B1:LCD/22', 'ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART1', - 'TWI2', 'SPI1', 'E2:SD1', ] + eoma68 = ['B1:LCD/22', 'ULPI0/8', 'ULPI1', 'EMMC', 'MMC0', 'UART1', + 'TWI2', 'SPI1', 'E2:MMC1', ] eoma68_eint = ['EINT_16', 'EINT_17', 'EINT_18', 'EINT_19'] eoma68_pwm = ['D1:PWM_2'] descriptions = { - 'MMC': 'internal (on Card)', - 'SD0': 'user-facing: internal (on Card), multiplexed with JTAG0\n' + 'EMMC': 'internal (on Card)', + 'MMC0': 'user-facing: internal (on Card), multiplexed with JTAG0\n' 'and UART0, for debug purposes', 'TWI2': 'EOMA68-compliance: must be entirely free of devices.\n' 'Address 0x51 used (externally) for EOMA68 EEPROM Id', - 'E2:SD1': 'EOMA68-compliance', + 'E2:MMC1': 'EOMA68-compliance', 'SPI1': 'EOMA68-compliance', 'UART1': 'EOMA68-compliance', 'B1:LCD/22': 'EOMA68-compliance, 18-bit RGB/TTL LCD', @@ -254,13 +245,13 @@ def pinspec(of): # Focus is on getting as many UARTs, SPIs and TWIs as possible. # OTG_ID (if to be used) would require dropping some functions in order # to free up GPIO. LCD could be reduced to 15-bit (freeing 3). - # MMC could be reduced to 4-bit-wide, used as SD/MMC (freeing 4). + # EMMC could be reduced to 4-bit-wide, used as SD/MMC (freeing 4). # QSPI could be used in 1-bit (MOSI/MISO) mode (freeing up 2 more). industrial = ['D1:FB/17', 'E1:FB/8', 'B1:LCD/22', 'ULPI0/8', 'ULPI1/8', - 'MMC', 'B2:SD0', - 'JTAG0', 'A3:UART0', 'E2:UARTQ1', 'C3:UARTQ0', - 'F2:TWI0', 'D2:TWI1', 'D2:TWI2', 'SPI1', 'QSPI', 'F2:SD2'] + 'EMMC', 'B2:MMC0', + 'JTAG0', 'A3:UART0', 'E2:QUART1', 'C3:QUART0', + 'F2:TWI0', 'D2:TWI1', 'D2:TWI2', 'SPI1', 'QSPI', 'F2:MMC2'] industrial_pwm = ['F2:PWM_0', 'F2:PWM_1', 'D1:PWM_2'] industrial_eint = ['EINT_24', 'EINT_25', 'EINT_26', 'EINT_27', 'EINT_20', 'EINT_21', 'EINT_22', 'EINT_23'] @@ -277,10 +268,10 @@ def pinspec(of): # also possibility of freeing up FlexBus CS# with a little reorg. industrial = ['D1:FB/17', 'E1:FB/8', 'B2:SPI0', 'ULPI0/8', 'ULPI1/8', - 'MMC', 'B2:SD0', + 'EMMC', 'B2:MMC0', 'JTAG0', - 'A3:UART0', 'E2:UARTQ1', 'C3:UARTQ0', 'B2:UART2', 'B2:UART1', - 'F2:TWI0', 'D2:TWI1', 'D2:TWI2', 'SPI1', 'QSPI', 'F2:SD2'] + 'A3:UART0', 'E2:QUART1', 'C3:QUART0', 'B2:UART2', 'B2:UART1', + 'F2:TWI0', 'D2:TWI1', 'D2:TWI2', 'SPI1', 'QSPI', 'F2:MMC2'] industrial_pwm = ['F2:PWM_0', 'F2:PWM_1', 'D1:PWM_2'] industrial_eint = ['EINT_24', 'EINT_25', 'EINT_26', 'EINT_27', 'EINT_20', 'EINT_21', 'EINT_22', 'EINT_23'] @@ -296,12 +287,12 @@ def pinspec(of): # Smartphone / Tablet - basically the same thing tablet = ['B1:LCD/22', 'ULPI0/8', 'ULPI1/8', - 'MMC', 'SD0', + 'EMMC', 'MMC0', 'F1:IIS', # I2C Audio 'TWI1', # I2C Audio - 'E2:UARTQ1', # WIFI/BT - 'E2:SD1', # WIFI - 'C3:UARTQ0', # GPS + 'E2:QUART1', # WIFI/BT + 'E2:MMC1', # WIFI + 'C3:QUART0', # GPS 'D2:UART1', 'D2:UART2', 'D3:TWI0', 'D2:TWI2', 'SPI1', 'QSPI'] @@ -323,18 +314,18 @@ def pinspec(of): descriptions = { 'B1:LCD/22': 'RGB/TTL LCD, 800x480 or use SN75LVDS83b for up to 1440x900', - 'MMC': 'eMMC: main internal storage', + 'EMMC': 'eMMC: main internal storage', 'ULPI0/8': 'USB-OTG, connect to ULPI OTG PHY (for charging)\n' 'as well as USB Host or USB Device', 'ULPI1/8': 'USB2 Host, connect to ULPI PHY w/and 4-port USB2 Hub\n' 'for example GL850G or FE1.1. ' 'Connects to 2/3/4G/LTE Modem, 2x USB-Camera (VC0345)', - 'SD0': 'internal, multiplexed with JTAG0\n' + 'MMC0': 'internal, multiplexed with JTAG0\n' 'and UART0, for debug purposes', 'F1:IIS': 'I2C Audio, connect to AC97 Audio IC', 'TWI1': 'Connect to AC97 Audio IC', - 'E2:UARTQ1': 'Connect to BT on AP6234/AP6335', - 'E2:SD1': 'Connect to WIFI on AP6234/AP6335', + 'E2:QUART1': 'Connect to BT on AP6234/AP6335', + 'E2:MMC1': 'Connect to WIFI on AP6234/AP6335', 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.', @@ -377,11 +368,11 @@ def pinspec(of): # Laptop laptop = ['D1:FB/17', 'E1:FB/8', 'B1:LCD/22', 'ULPI0/8', 'ULPI1/8', - 'MMC', 'SD0', + 'EMMC', 'MMC0', 'F1:IIS', # I2C Audio 'TWI1', # I2C Audio - 'E2:UARTQ1', # WIFI/BT - 'E2:SD2', # WIFI + 'E2:QUART1', # WIFI/BT + 'E2:MMC2', # WIFI 'D2:TWI2', 'QSPI'] laptop_pwm = ['F2:PWM_0', # LCD_BACKLIGHT ] @@ -395,22 +386,22 @@ def pinspec(of): '10/100 Ethernet PHY.', 'E1:FB/8': 'FlexBus bus bits 8-15, needed to make a 16-bit bus width', 'B1:LCD/22': 'RGB/TTL LCD, use SN75LVDS83b for ' - 'LVDS or SSD2828 for MIPI,\n' + 'LVDS or SMMC2828 for MIPI,\n' 'or a Chrontel CH7039, CH7038, CH7034 or CH7018 for dual\n' 'display output (eDP/LVDS and HDMI/VGA) ' 'conversion.', - 'MMC': 'eMMC: main internal storage', + 'EMMC': 'eMMC: main internal storage', 'ULPI0/8': 'USB-OTG, connect to ULPI OTG PHY (for charging)\n' 'as well as USB Host or USB Device', 'ULPI1/8': 'USB2 Host, connect to ULPI PHY w/and 4-port USB2 Hub\n' 'for example GL850G or FE1.1. ' 'Connects to USB-Camera (VC0345 and 3x external USB Ports)', - 'SD0': 'internal, multiplexed with JTAG0\n' + 'MMC0': 'internal, multiplexed with JTAG0\n' 'and UART0, for debug purposes', 'F1:IIS': 'I2C Audio, connect to AC97 Audio IC', 'TWI1': 'Connect to AC97 Audio IC', - 'E2:UARTQ1': 'Connect to BT on AP6234/AP6335', - 'E2:SD2': 'Connect to WIFI on AP6234/AP6335', + 'E2:QUART1': 'Connect to BT on AP6234/AP6335', + 'E2:MMC2': 'Connect to WIFI on AP6234/AP6335', 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.\n' @@ -432,13 +423,13 @@ def pinspec(of): # IoT iot = ['B1:LCD', 'ULPI1/8', 'ULPI0/8', - 'MMC', 'SD0', + 'EMMC', 'MMC0', 'F1:IIS', # I2C Audio #'TWI1', # I2C Audio - 'C3:UARTQ0', # HSPA UART - 'E2:UARTQ1', # BT UART + 'C3:QUART0', # HSPA UART + 'E2:QUART1', # BT UART 'C2:SPI1', # HSPI SPI - 'E2:SD2', # WIFI + 'E2:MMC2', # WIFI 'D3:TWI0', # sensors CTP, 'D2:TWI2', 'QSPI'] iot_pwm = ['F2:PWM_0', # LCD_BACKLIGHT @@ -461,20 +452,20 @@ def pinspec(of): ] descriptions = { 'B1:LCD': - 'RGB/TTL LCD, use SN75LVDS83b for LVDS or SSD2828 for MIPI,\n' + 'RGB/TTL LCD, use SN75LVDS83b for LVDS or SMMC2828 for MIPI,\n' 'or a Chrontel CH7039, CH7038, CH7034 or CH7018 for dual\n' 'display output (eDP/LVDS and HDMI/VGA) ' 'conversion.', - 'MMC': 'eMMC: main internal storage', + 'EMMC': 'eMMC: main internal storage', 'F1:IIS': 'I2C Audio, connect to AC97 Audio IC', 'ULPI1/8': 'USB-OTG, connect to ULPI OTG PHY (for charging)\n' 'as well as USB Host or USB Device', 'ULPI0/8': 'USB2 Host, connect to ULPI PHY', - 'SD0': 'internal, multiplexed with JTAG0\n' + 'MMC0': 'internal, multiplexed with JTAG0\n' 'and UART0, for debug purposes', - 'C3:UARTQ0': 'Connect to HSPA UART', - 'E2:UARTQ1': 'Connect to BT UART', - 'E2:SD2': 'Connect to WIFI', + 'C3:QUART0': 'Connect to HSPA UART', + 'E2:QUART1': 'Connect to BT UART', + 'E2:MMC2': 'Connect to WIFI', 'C2:SPI1': 'HSPA SPI', 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' @@ -521,4 +512,4 @@ def pinspec(of): iot, iot_eint, iot_pwm, descriptions) - return ps.write(of) + return ps