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(parent: d488bbb) | patch
set_mmu_spr was using the slow-SPR index for the regfile
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 16 Dec 2021 14:37:06 +0000 (14:37 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 16 Dec 2021 14:37:06 +0000 (14:37 +0000)
commit19729d85680d66604bd58ecc49007f6983855729
tree3067357f44f3402461f7151e03dd12db9abbe809tree
parentd488bbb5663bfa4c19074e549e8a73624641065acommit | diff
set_mmu_spr was using the slow-SPR index for the regfile
not the actual 10-bit SPR number.  hence trying to set PRTBL
fails
src/soc/experiment/mmu.py diff | blob | history
src/soc/simple/test/test_core.py diff | blob | history