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(parent: d4703be) | patch
AArch64: Implement missing vcls intrinsics on unsigned types
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Tue, 22 Sep 2020 11:03:49 +0000 (12:03 +0100)
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>
Tue, 22 Sep 2020 11:03:49 +0000 (12:03 +0100)
commit30957092db46d8798e632feefb5df634488dbb33
tree853f4cae558a02ccf5d3b30a849a69940f22dd64tree
parentd4703be185b422f637deebd3bb9222a41c8023d6commit | diff
AArch64: Implement missing vcls intrinsics on unsigned types

This patch implements some missing intrinsics that perform a CLS on unsigned SIMD types.

Bootstrapped and tested on aarch64-none-linux-gnu.

gcc/
PR target/71233
* config/aarch64/arm_neon.h (vcls_u8, vcls_u16, vcls_u32,
vclsq_u8, vclsq_u16, vclsq_u32): Define.

gcc/testsuite/
PR target/71233
* gcc.target/aarch64/simd/vcls_unsigned_1.c: New test.
gcc/config/aarch64/arm_neon.h diff | blob | history
gcc/testsuite/gcc.target/aarch64/simd/vcls_unsigned_1.c [new file with mode: 0644] blob