Unify Xilinx platforms into a single class, support more devices
authorMarcelina Koƛcielnicka <mwk@0x04.net>
Wed, 16 Dec 2020 15:35:57 +0000 (16:35 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 31 Dec 2021 15:31:28 +0000 (15:31 +0000)
commit51bfa30b27769f3fcaf6ec1b5b0b89bf7f1a22d7
tree3a8e0149e020c3a4cbabdafdb4a450c4bcd3da98
parent103aff925dc5fa3ecc046d46d31061fc65c7fb8a
Unify Xilinx platforms into a single class, support more devices

This merges existing code, and also adds support for:

- Virtex, Virtex E (also known as Spartan 2, Spartan 2E)
- Virtex 2, Virtex 2 Pro
- Spartan 3, Spartan 3E (in addition to existing Spartan 3A, Spartan 3A
  DSP support)
- Virtex 4
- Virtex 5
- Virtex 6
- ISE synthesis for Series 7

Fixes #552.
nmigen/vendor/xilinx.py [new file with mode: 0644]
nmigen/vendor/xilinx_7series.py
nmigen/vendor/xilinx_spartan_3_6.py
nmigen/vendor/xilinx_ultrascale.py