revise diagram to include twin-l0-port
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 27 Apr 2020 10:34:32 +0000 (11:34 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 27 Apr 2020 10:34:32 +0000 (11:34 +0100)
commit775f3632936cf97f9c418c3094880ec1b49027c5
tree0d50a2fc83435dba5170e3ff56ed1db71aef3861
parent79e4f6cff8d8fd7af99b1dfef16d8b5edc5a24a5
revise diagram to include twin-l0-port
3d_gpu/180nm_single_core_testasic_memlayout.jpg