increase (double) address width in TstL0CacheBuffer
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 27 Jun 2020 19:12:02 +0000 (20:12 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 27 Jun 2020 19:12:02 +0000 (20:12 +0100)
commit9ef2e379843af6add4d3a34a7b2ef567d26b21fc
treefccad663e9a442d6445b945ad3072447183fa8ce
parentf95e68dc870e4e26d1b36f92b8da4d3673ae6384
increase (double) address width in TstL0CacheBuffer
src/soc/experiment/l0_cache.py