arch-power: Fix fixed-point word shift instructions
authorSandipan Das <sandipan@linux.vnet.ibm.com>
Thu, 7 Jun 2018 12:46:46 +0000 (18:16 +0530)
committerSandipan Das <sandipan@linux.vnet.ibm.com>
Thu, 7 Jun 2018 12:46:46 +0000 (18:16 +0530)
commitc520e10954d5e47e05aa9af8fc501a5ade4cf83f
tree4043d0b500fec6a415768ad9c98b319d64574585
parent9e4bf8e0cf12b536ef3f26c17c3271bd9c91e6ca
arch-power: Fix fixed-point word shift instructions

This fixes the following shift instructions:
  * Shift Left Word (slw[.])
  * Shift Right Word (srw[.])
  * Shift Right Algebraic Word (sraw[.])
  * Shift Right Algebraic Word Immediate (srawi[.])

For 64-bit execution, these instructions should perform
shift operations on only the lower order 32 bits of the
source register instead of all 64 bits.

This also fixes disassembly generation for all of the above.

Change-Id: I18871486d74969244d474eaf0f9d810f06faf50a
Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com>
src/arch/power/insts/integer.cc
src/arch/power/insts/integer.hh
src/arch/power/isa/decoder.isa
src/arch/power/isa/formats/integer.isa