walk whole of sim memory rather than risk missing some addresses
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 20 Sep 2021 17:34:16 +0000 (18:34 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 20 Sep 2021 17:34:16 +0000 (18:34 +0100)
commitcee8390ed1b5130e74f67187bf1ec79232f2211c
tree655ff1dbeed20af3d7049b9b59e4730a22c3d7c2
parent7ab01f5814f30fa5ab2a1b48cf49818e428b05a6
walk whole of sim memory rather than risk missing some addresses
src/openpower/test/state.py