intercon: Generate stall signals for non-pipelined slaves
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 18 Oct 2019 23:27:56 +0000 (10:27 +1100)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 30 Oct 2019 02:18:58 +0000 (13:18 +1100)
commitdf1a9237f6ae06414ec93eda3adfc147756ed3fd
tree2454a6ce9049e301b8e57611a56f8ffa76cdc0cf
parent7a4a9b6377cb04438ab02a25fe167b7e026b01fb
intercon: Generate stall signals for non-pipelined slaves

So far the UART and the "miss" case. Memory will be
pipelined

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
soc.vhdl