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author
lkcl
<lkcl@web>
Tue, 28 Jun 2022 09:36:53 +0000
(10:36 +0100)
committer
IkiWiki
<ikiwiki.info>
Tue, 28 Jun 2022 09:36:53 +0000
(10:36 +0100)
openpower/sv/branches.mdwn
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diff --git
a/openpower/sv/branches.mdwn
b/openpower/sv/branches.mdwn
index fb9b9da34c7b32f4a38f9f4fa39101990f6a919a..5f5be19fbe37e9763d73150a7b2a81e3f530d29d 100644
(file)
--- a/
openpower/sv/branches.mdwn
+++ b/
openpower/sv/branches.mdwn
@@
-168,8
+168,6
@@
Conditional:
|ALL|SNZ|CTi| / | SL |SLu | 1 | 0 | / | LRu sz | CTR-test mode |
|ALL|SNZ|CTi|VSb| SL |SLu | 1 | 1 | VLI | LRu sz | CTR-test+VLSET mode |
|ALL|SNZ|CTi| / | SL |SLu | 1 | 0 | / | LRu sz | CTR-test mode |
|ALL|SNZ|CTi|VSb| SL |SLu | 1 | 1 | VLI | LRu sz | CTR-test+VLSET mode |
-TODO bits 17,18 for SVSTATE-variant of LR and LRu.
-
Brief description of fields:
* **sz=1** if predication is enabled and `sz=1` and a predicate
Brief description of fields:
* **sz=1** if predication is enabled and `sz=1` and a predicate
@@
-195,6
+193,10
@@
Brief description of fields:
If VLI (Vector Length Inclusive) is clear,
VL is truncated to *exclude* the current element, otherwise it is
included. SVSTATE.MVL is not altered: only VL.
If VLI (Vector Length Inclusive) is clear,
VL is truncated to *exclude* the current element, otherwise it is
included. SVSTATE.MVL is not altered: only VL.
+* **SL** identical to `LR` except applicable to SVSTATE. If `SL`
+ is set, SVSTATE is transferred to SVLR (conditionally on
+ whether `SLu` is set).
+* **SLu**: SVSTATE Link Update, like `LRu` except applies to SVSTATE.
* **LRu**: Link Register Update, used in conjunction with LK=1
to make LR update conditional
* **VSb** In VLSET Mode, after testing,
* **LRu**: Link Register Update, used in conjunction with LK=1
to make LR update conditional
* **VSb** In VLSET Mode, after testing,