+\frame{\frametitle{Challenging Stuff [3] - Power Management}
+
+ \begin{itemize}
+ \item Been done before (many times), but not as a Libre Design.
+ \item Sanjay Charagulla: GlobalFoundries 22nm mobile process
+ can reach as low as 0.4v
+ \item GPIO Banks need per-bank VREF (1.8v? to 3.3v)\\
+ IO pads need built-in
+ level-shifting to convert to CPU VCORE
+ \item Each core needs independent variable-voltage capability
+ and independent shut-down (PMIC supplies external voltage)
+ \item DDR RAM still needs refreshing (even in sleep mode)
+ \item Extra RV32 (PicoRV32?) always-on core for wake-up / RTC?
+ \item PLLs are Analog. fun fun fun in the sun sun sun...
+ \end{itemize}
+ {\it Really need help. PLLs, Analog stuff: specific
+ domain expertise. Fall-back example:
+ https://www.dolphin-integration.com?
+ }
+}
+
+
+\frame{\frametitle{Challenging Stuff [4] - Libre 3D GPU. Sigh.}