+# FPR/GPR LD/ST-PostIncrement-Update
+
+These instruction, outlined in [[ls011]], save hugely in hot-loops. Early ISAs
+such as PDP-8, PDP-11, which inspired the iconic Motorola 68000, 88100, Mitch
+Alsup's MyISA 66000, and can even be traced back to the iconic ultra-RISC CDC 6600,
+all had both pre- and post- increment Addressing Modes.
+
+The reason is very simple: it is a direct recognition of the practice in c to
+frequently utilise both `*p++` and `*++p` which itself stems from common need in
+Computer Science algorithms.
+
+The problem for the Power ISA is - was - that the opcode space needed to support both
+was far too great, and the decision was made to go with pre-increment, on the basis
+that outside the loop a "pre-subtraction" may be performed.
+
+Whilst this is a "solution" it is less than ideal, and the opportunity exists now
+with the EXT2xx Primary Opcodes to correct this and bring Power ISA up a level.
+
+