- # set the load-hold-store / store-hold-load OR-accumulated outputs
- m.d.comb += self.ld_hold_st_o.eq(Cat(*lhs_l).bool())
- m.d.comb += self.st_hold_ld_o.eq(Cat(*shl_l).bool())
+ # connect the load-hold-store / store-hold-load OR-accumulated outputs
+ m.d.comb += self.ld_hold_st_o.eq(Cat(*lhs_l))
+ m.d.comb += self.st_hold_ld_o.eq(Cat(*shl_l))
+
+ # the load/store input also needs to be connected to "top" (vertically)
+ for fu in range(self.n_ldst):
+ load_v_l = []
+ stor_v_l = []
+ for fux in range(self.n_ldst):
+ dc = dm[fux]
+ load_v_l.append(dc.load_v_i[fu])
+ stor_v_l.append(dc.stor_v_i[fu])
+ m.d.comb += [Cat(*load_v_l).eq(self.load_i),
+ Cat(*stor_v_l).eq(self.stor_i),
+ ]