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author
lkcl
<lkcl@web>
Sat, 2 Jul 2022 22:09:06 +0000
(23:09 +0100)
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IkiWiki
<ikiwiki.info>
Sat, 2 Jul 2022 22:09:06 +0000
(23:09 +0100)
openpower/sv/overview.mdwn
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a/openpower/sv/overview.mdwn
b/openpower/sv/overview.mdwn
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openpower/sv/overview.mdwn
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openpower/sv/overview.mdwn
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by SimpleV:
(VSX Rijndael and SHA primitives; VSX shuffle and bitpermute operations)
* register files above 128 entries
* Vector lengths over 64
(VSX Rijndael and SHA primitives; VSX shuffle and bitpermute operations)
* register files above 128 entries
* Vector lengths over 64
-* Unit-strided LD/ST and other comprehensive memory operations
- (struct-based LD/ST from RVV for example)
-* 32-bit instruction lengths. [[svp64]] had to be added as 64 bit.
+* 32-bit instruction lengths. [[sv/svp64]] had to be added as 64 bit.
These limitations, which stem inherently from the adaptation process of
starting from a Scalar ISA, are not insurmountable. Over time, they may
These limitations, which stem inherently from the adaptation process of
starting from a Scalar ISA, are not insurmountable. Over time, they may