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diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 0eb80a6d27a028a0d0b3326d9431f99860a7e4d1..938f80ee0b6b702b722cc6765e4b8cdeba0203b9 100644 (file)
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -34,13 +34,15 @@ that for example a single FMAC may be used in a single hardware-controlled
 100% Deterministic loop to perform 5x3 times 3x4 Matrix multiplication,
 generating 60 FMACs *without needing explicit assembler unrolling*.
 Additional uses include regular "Structure Packing" such as RGB pixel
 100% Deterministic loop to perform 5x3 times 3x4 Matrix multiplication,
 generating 60 FMACs *without needing explicit assembler unrolling*.
 Additional uses include regular "Structure Packing" such as RGB pixel

-data extraction and reforming.
+data extraction and reforming (although less costly vec2/3/4 reshaping
+is achievable with `PACK/UNPACK`).

 
 REMAP, like all of SV, is abstracted out, meaning that unlike traditional
 Vector ISAs which would typically only have a limited set of instructions
 that can be structure-packed (LD/ST and Move operations
 being the most common), REMAP may be applied to
 
 REMAP, like all of SV, is abstracted out, meaning that unlike traditional
 Vector ISAs which would typically only have a limited set of instructions
 that can be structure-packed (LD/ST and Move operations
 being the most common), REMAP may be applied to

-literally any instruction: CRs, Arithmetic, Logical, LD/ST, anything.
+literally any instruction: CRs, Arithmetic, Logical, LD/ST, even
+Vectorised Branch-Conditional.

 
 When SUBVL is greater than 1 a given group of Subvector
 elements are kept together: effectively the group becomes the
 
 When SUBVL is greater than 1 a given group of Subvector
 elements are kept together: effectively the group becomes the