instruction as REMAP, providing re-sequencing of
Subvector elements which REMAP cannot. Also as explained in [[sv/mv.swizzle]], [[sv/mv.vec]] and the [[svp64/appendix]], Pack and Unpack Mode bits
can extend down into Sub-vector elements to influence vec2/vec3/vec4
instruction as REMAP, providing re-sequencing of
Subvector elements which REMAP cannot. Also as explained in [[sv/mv.swizzle]], [[sv/mv.vec]] and the [[svp64/appendix]], Pack and Unpack Mode bits
can extend down into Sub-vector elements to influence vec2/vec3/vec4